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公开(公告)号：US20200374473A1
公开(公告)日：2020-11-26
申请号：US16992492
申请日：2020-08-13
摘要： A system and method is provided for performing high dynamic range digital double sampling. More particularly, a CMOS image sensor is provided that includes a pixel array with each pixel sampling both dark and bright values for digital double sampling. After the sampled signals are digitized, a mean dark value is determined and each dark value is further fed to a lookup table that generates an output value taking into account whether the pixel has been saturated. In over exposed conditions, the lookup table will generate a negative value output to eliminate image artifacts. All three values are fed to adder logic circuit that subtracts the mean dark value and the lookup table output from the bright value. This resulting output is fed to a video viewer.
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公开(公告)号：US10761707B2
公开(公告)日：2020-09-01
申请号：US15920095
申请日：2018-03-13
发明人： Ian David Fletcher
IPC分类号： G06F3/0484 , G06F9/451 , G06F3/0483 , G06F9/50 , H04L12/911 , G06F3/06 , G06F9/455 , G06F17/00
摘要： A computing device and method for providing a user interface for summarizing and presenting information regarding dynamic provisioning and deployment of media processing resources, in a manner that is easy and intuitive and analogizes well to conventional physical media processing deployment. Users are not required to understand hypervisor configuration or virtual machine deployment, or switch through various layers and screens to find configuration information or controls, a process that may be particularly slow, complex, and difficult to learn, particularly for media and broadcast engineers unfamiliar with virtualization technologies. Instead, the present user interface improves efficiency of use of the computing environment for media processing, by providing deployment information in a format similar to physical processing deployment. Furthermore, because the user interface lends itself to intuitive monitoring and use, users may more accurately and efficiently deploy and undeploy processing resources, reducing overall system processing requirements, cost, and power consumption.
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公开(公告)号：US10750109B2
公开(公告)日：2020-08-18
申请号：US16403844
申请日：2019-05-06
IPC分类号： H04N5/374 , H04N5/357 , H04N5/363 , H04N5/345 , H01L27/146 , H04N5/3745 , H04N5/378 , H04N5/376
摘要： A method for performing differential double sampling and a CMOS image sensing device for performing the same. In one example, the CMOS image sensing device includes a pixel array include a multitude of pixels with each pixel formed by a plurality of photodiodes, a floating diffusion point and a plurality of transistors electrically coupled the plurality of photodiodes. Moreover, a column readout circuit with four storage capacitors is selectively coupled to the pixel array by switches so that the storage capacitors can store sampled pixel values. A control circuit connected to the pixel array and the column readout circuit selectively activates the transistors to output to the column readout circuit sampled dark value and bright values of one photodiode and a sampled double bright value of the one photodiode and one additional photodiode.
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公开(公告)号：US10687006B2
公开(公告)日：2020-06-16
申请号：US15483259
申请日：2017-04-10
发明人： Jeroen Rotte , Peter Centen
摘要： An image sensor is provided. In one aspect, the image sensor includes a pixel coupled to an output line. The pixel includes a photodiode configured to generate electrical charges in response to light and a supply circuit configured to supply a voltage to the photodiode to keep a voltage of the photodiode at or above a threshold level in an integration time. In another aspect, the pixel includes a supply circuit configured to selectively supply voltage to the photodiode in a first charge holding capacity and a second charge holding capacity.
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公开(公告)号：US20200162684A1
公开(公告)日：2020-05-21
申请号：US16751020
申请日：2020-01-23
摘要： An imaging system is provided that includes a pixel array having a plurality of columns with rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. Moreover, the system includes row driver circuitry that control the pixel array for pixel addressing and readout, such that the respective accumulation voltages of the photodiodes is read out on a readout channel coupled to a bit line column, and a hybrid multiplexer that multiplexes and routes output signals from the pixel array to a video imaging device to be displayed thereon.
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公开(公告)号：US20200162683A1
公开(公告)日：2020-05-21
申请号：US16750602
申请日：2020-01-23
摘要： An imager that includes a pixel array with a plurality of columns having rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. The imager further includes row driver circuitry that controls the pixel array for pixel addressing and readout, with the row driver circuitry including a plurality of shift registers, and an image sensor controller that controls the plurality of shift registers to address the rows of pixels in the pixel array. Moreover, the row driver circuitry dynamically upward and downward shifts control signals to the pixel array, such that two rows of pixels in a single column of the pixel array are addressed during a single row time.
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公开(公告)号：US20190394518A1
公开(公告)日：2019-12-26
申请号：US16562229
申请日：2019-09-05
发明人： Stephane MARTEL , Charles S. MEYER
IPC分类号： H04N21/43 , H04L29/06 , H04N21/4402
摘要： A media stream receiver is provided for scalable physical layer flow of packetized media streams. The media stream receiver replicates the processing block in time, rather than in hardware, through the use of a single shared memory and pointer alignment calculations, which combines multiple buffering stages as the single, shared memory buffer to offer redundancy and alignment, while acting as a receiver buffer to account for packet delay variations. By doing so the media stream receiver can perform a vertical interval switch between received media streams.
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公开(公告)号：US10419697B2
公开(公告)日：2019-09-17
申请号：US15693034
申请日：2017-08-31
摘要： A system and method is provided for performing high dynamic range digital double sampling. More particularly, a CMOS image sensor is provided that includes a pixel array with each pixel sampling both dark and bright values for digital double sampling. After the sampled signals are digitized, a mean dark value is determined and each dark value is further fed to a lookup table that generates an output value taking into account whether the pixel has been saturated. In over exposed conditions, the lookup table will generate a negative value output to eliminate image artifacts. All three values are fed to adder logic circuit that subtracts the mean dark value and the lookup table output from the bright value. This resulting output is fed to a video viewer.
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公开(公告)号：US20190279683A1
公开(公告)日：2019-09-12
申请号：US16425430
申请日：2019-05-29
发明人： Naoya YAMASAKI
IPC分类号： G11B27/034 , G06K9/00 , G11B15/18
摘要： An editing apparatus for an editing video sequence that includes an editing unit for setting a first range to one part of the video sequence; a video sequence file generating unit for generating a video sequence file including video sequence corresponding to the first range and video sequence corresponding to a second range, within the second range is consecutively preceding to and/or subsequent to the first range; and an output for outputting the video sequence file.
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公开(公告)号：US20190268285A1
公开(公告)日：2019-08-29
申请号：US16403394
申请日：2019-05-03
发明人： Charles S. MEYER , Ken BUTTLE
IPC分类号： H04L12/933 , H04L12/931 , H04L12/721 , H04L12/947 , H04N5/262
摘要： A router fabric for switching real time broadcast video signals in a media processing network includes a logic device configured to route multiple channels of packetized video signals to another network device, a crossbar switch configured to be coupled to a plurality of input/output components and to switch video data of the multiple channels between the logic device and the plurality of input/output components in response to a control instruction, and a controller configured to map routing addresses for each video signal relative to the system clock, and to send the control instruction with the mapping to the crossbar switch and the logic device.
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