Method of manufacturing multiple-gate MOS transistor having an improved channel structure
    71.
    发明授权
    Method of manufacturing multiple-gate MOS transistor having an improved channel structure 有权
    制造具有改善的沟道结构的多栅极MOS晶体管的方法

    公开(公告)号:US07208356B2

    公开(公告)日:2007-04-24

    申请号:US10989006

    申请日:2004-11-16

    IPC分类号: H01L21/00 H01L21/84

    CPC分类号: H01L29/785 H01L29/66818

    摘要: Provided is a multiple-gate metal oxide semiconductor (MOS) transistor and a method for manufacturing the same, in which a channel is implemented in a streamline shape, an expansion region is implemented in a gradually increased form, and source and drain regions is implemented in an elevated structure by using a difference of a thermal oxidation rate depending on a crystal orientation of silicon and a geographical shape of the single-crystal silicon pattern. As the channel is formed in a streamline shape, it is possible to prevent the degradation of reliability due to concentration of an electric field and current driving capability by the gate voltage is improved because the upper portion and both sides of the channel are surrounded by the gate electrodes. In addition, a current crowding effect is prevented due to the expansion region increased in size and source and drain series resistance is reduced by elevated source and drain structures, thereby increasing the current driving capability.

    摘要翻译: 提供一种多栅极金属氧化物半导体(MOS)晶体管及其制造方法,其中以流线形状实现沟道,扩展区域以逐渐增加的形式实现,并且实现源极和漏极区域 通过使用取决于硅的晶体取向的热氧化速率的差异和单晶硅图案的地理形状,在升高的结构中。 由于通道形成为流线形状,所以可以防止由于电场集中引起的可靠性的劣化,由于栅极电压的电流驱动能力得到改善,因为通道的上部和两侧被 栅电极。 此外,由于扩大区域的尺寸增加,阻止了电流拥挤效应,并且通过升高的源极和漏极结构降低了源极和漏极串联电阻,从而增加了电流驱动能力。