公开(公告)号：US20100083296A1

公开(公告)日：2010-04-01

申请号：US12562392

申请日：2009-09-18

申请人： Jae Hyun Park ,  Cheong Un Han

发明人： Jae Hyun Park ,  Cheong Un Han

IPC分类号： G11B17/03

CPC分类号： G11B17/0282

摘要： A turn table of a spindle motor in which a small-diameter disk can be freely attached and detached is disclosed, wherein the disk insertion unit includes an inclination portion guiding the inserted disk, and a vertical portion extensively formed from the inclination portion to the disk accommodation unit to allow an inner periphery of the disk to be brought into contact, and wherein the claw includes an inclination claw portion guiding the inserted disk and a vertical claw portion bent from the inclination claw portion to chuck the disk, and wherein an outer diameter of the vertical portion at the disk insertion unit is 14.94˜l4.96 mm and an outer diameter of the vertical claw portion at the claw is 15.17˜15.23 mm.

摘要翻译： 公开了一种主轴电动机的转台，其中小直径盘可以自由地安装和拆卸，其中盘插入单元包括引导插入盘的倾斜部分和从倾斜部到盘的广泛形成的垂直部分 容纳单元，以使盘的内周接触，并且其中所述爪包括引导插入盘的倾斜爪部分和从倾斜爪部弯曲以夹紧盘的垂直爪部，并且其中外径 在盘插入单元处的垂直部分的直径为14.94〜14.96mm，爪的垂直爪部的外径为15.17〜15.23mm。

公开(公告)号：US20080176345A1

公开(公告)日：2008-07-24

申请号：US11655483

申请日：2007-01-19

申请人： Shaofeng Yu ,  Richard L. Guldi ,  Jiong-Ping Lu ,  Freidoon Mehrad ,  Jae Hyun Park

发明人： Shaofeng Yu ,  Richard L. Guldi ,  Jiong-Ping Lu ,  Freidoon Mehrad ,  Jae Hyun Park

IPC分类号： H01L21/66

CPC分类号： H01L22/14

摘要： Gate dielectric punch through and/or incomplete silicidation or metallization events that may occur during transistor formation are identified. The events are identified just after gate electrodes are formed in order to characterize the degree of faulty transistors for process control purposes and to scrap product if sufficiently defective so that subsequent resources are not unnecessarily expended. An electron beam or ebeam is directed at locations of a workpiece whereon on or more transistors are formed. Electrons that are resultantly emitted from these locations are detected and used to develop respective gray level values (GLV's). Gate dielectric punch through and/or incomplete silicidation or metallization events are identified by finding high or low GLV's relative to neighboring areas.

摘要翻译： 识别在晶体管形成期间可能发生的栅极电介质穿透和/或不完全的硅化或金属化事件。 在形成栅极电极之后才识别事件，以便表征用于过程控制目的的故障晶体管的程度，并且如果充分有缺陷，则废弃产品，使得后续资源不会被不必要地消耗。 电子束或ebeam被引导到其上形成有多个晶体管的工件的位置。 从这些位置发射的电子被检测并用于开发各自的灰度值（GLV's）。 通过相对于相邻区域发现高或低GLV来鉴定栅极电介质穿透和/或不完全硅化或金属化事件。