SEMICONDUCTOR ASSEMBLY AND METHOD FOR FORMING SEAL RING
    81.
    发明申请
    SEMICONDUCTOR ASSEMBLY AND METHOD FOR FORMING SEAL RING 有权
    半导体组件和形成密封圈的方法

    公开(公告)号:US20100084735A1

    公开(公告)日:2010-04-08

    申请号:US12247234

    申请日:2008-10-08

    申请人: Chin-Sheng Yang

    发明人: Chin-Sheng Yang

    IPC分类号: H01L29/00 H01L21/76

    CPC分类号: B81C1/00246

    摘要: A method for forming a seal ring is disclosed. First, a substrate including a MEMS region, a logic region and a seal ring region is provided. Second, a trench is formed in the MEMS region and multiple recesses are formed in the seal ring region. An oxide fills the trench and the recesses. Later, a MOS is form in the logic region and a dielectric layer is formed on the substrate. Then, an etching procedure is carried out to partially remove the dielectric layer and simultaneously remove the oxide in the multiple recesses completely to form a seal ring space. Afterwards, a metal fills the seal ring space to from the seal ring.

    摘要翻译: 公开了一种用于形成密封环的方法。 首先,提供包括MEMS区域,逻辑区域和密封环区域的基板。 其次,在MEMS区域中形成沟槽,在密封环区域形成多个凹部。 氧化物填充沟槽和凹槽。 之后,在逻辑区域形成MOS,在基板上形成电介质层。 然后,进行蚀刻处理以部分地去除电介质层,同时完全去除多个凹部中的氧化物以形成密封环空间。 之后,金属将密封环空间填充到密封环上。

    Pick-up structure for DRAM capacitors
    82.
    发明授权
    Pick-up structure for DRAM capacitors 有权
    DRAM电容拾取结构

    公开(公告)号:US07554148B2

    公开(公告)日:2009-06-30

    申请号:US11309131

    申请日:2006-06-27

    IPC分类号: H01L27/108

    摘要: A pick-up structure for DRAM capacitors and a DRAM process are described. A substrate with trenches therein is provided, wherein the trenches include a first trench and the sidewall of each of the trenches is formed with a dielectric layer thereon. A conductive layer is formed on the surfaces of the substrate and the trenches, and then a patterned photoresist layer is formed on the conductive layer filling in the trenches and further covering the first trench. The exposed conductive layer is removed to form bottom electrodes in the trenches, and then the patterned photoresist layer is removed. A capacitor dielectric layer is formed on each bottom electrode, and then top electrodes are formed on the substrate filling up the trenches. A contact is then formed on the bottom electrode in the first trench, electrically connecting the substrate via the bottom electrode.

    摘要翻译: 描述了用于DRAM电容器和DRAM工艺的拾取结构。 提供了其中具有沟槽的衬底,其中沟槽包括第一沟槽,并且每个沟槽的侧壁在其上形成有介电层。 在衬底和沟槽的表面上形成导电层,然后在填充在沟槽中的导电层上形成图案化的光致抗蚀剂层,并进一步覆盖第一沟槽。 去除暴露的导电层以在沟槽中形成底部电极,然后去除图案化的光致抗蚀剂层。 在每个底部电极上形成电容器电介质层,然后在填充沟槽的衬底上形成顶部电极。 然后在第一沟槽中的底部电极上形成接触,通过底部电极电连接衬底。

    Metal-oxide-semiconductor transistor and method of forming the same
    83.
    发明授权
    Metal-oxide-semiconductor transistor and method of forming the same 有权
    金属氧化物半导体晶体管及其形成方法

    公开(公告)号:US07547594B2

    公开(公告)日:2009-06-16

    申请号:US11870427

    申请日:2007-10-11

    申请人: Chin-Sheng Yang

    发明人: Chin-Sheng Yang

    IPC分类号: H01L21/336 H01L21/8234

    摘要: A method of forming a metal-oxide-semiconductor (MOS) transistor device is provided. First, a semiconductor substrate is prepared. Subsequently, a gate structure is formed on the semiconductor substrate. The gate structure includes a first strip portion and a second strip portion that is not parallel to the first strip portion. The gate structure further includes a junction between the first strip portion and the second strip portion. Thereafter, a stressed cap layer is formed on the semiconductor substrate, and covers the gate structure. Next, a portion of the stressed cap layer is removed to expose the junction between the first strip portion and the second strip portion.

    摘要翻译: 提供一种形成金属氧化物半导体(MOS)晶体管器件的方法。 首先,准备半导体基板。 随后,在半导体衬底上形成栅极结构。 门结构包括第一条带部分和不平行于第一条带部分的第二条带部分。 栅极结构还包括第一条带部分和第二条带部分之间的接合部。 此后,在半导体衬底上形成应力覆盖层,并覆盖栅极结构。 接下来,去除应力帽层的一部分以露出第一条带部分和第二条带部分之间的接合处。

    METAL-OXIDE-SEMICONDUCTOR TRANSISTOR AND METHOD OF FORMING THE SAME
    84.
    发明申请
    METAL-OXIDE-SEMICONDUCTOR TRANSISTOR AND METHOD OF FORMING THE SAME 有权
    金属氧化物半导体晶体管及其形成方法

    公开(公告)号:US20090095990A1

    公开(公告)日:2009-04-16

    申请号:US11870427

    申请日:2007-10-11

    申请人: Chin-Sheng Yang

    发明人: Chin-Sheng Yang

    IPC分类号: H01L29/78 H01L21/336

    摘要: A method of forming a metal-oxide-semiconductor (MOS) transistor device is provided. First, a semiconductor substrate is prepared. Subsequently, a gate structure is formed on the semiconductor substrate. The gate structure includes a first strip portion and a second strip portion that is not parallel to the first strip portion. The gate structure further includes a junction between the first strip portion and the second strip portion. Thereafter, a stressed cap layer is formed on the semiconductor substrate, and covers the gate structure. Next, a portion of the stressed cap layer is removed to expose the junction between the first strip portion and the second strip portion.

    摘要翻译: 提供一种形成金属氧化物半导体(MOS)晶体管器件的方法。 首先,准备半导体基板。 随后,在半导体衬底上形成栅极结构。 门结构包括第一条带部分和不平行于第一条带部分的第二条带部分。 栅极结构还包括第一条带部分和第二条带部分之间的接合部。 此后,在半导体衬底上形成应力覆盖层,并覆盖栅极结构。 接下来,去除应力帽层的一部分以露出第一条带部分和第二条带部分之间的接合处。