公开(公告)号：US06331954B1

公开(公告)日：2001-12-18

申请号：US09894777

申请日：2001-06-28

Applicant: John J. Wang ,  Jiang Li ,  Yider Wu

Inventor： John J. Wang ,  Jiang Li ,  Yider Wu

IPC: G11C1634

CPC classification number: G11C29/50 ,  G11C16/04 ,  G11C29/24 ,  G11C2029/5002 ,  G11C2029/5006

Abstract: For electrically determining the level of misalignment of floating gate structures closest to a gate stack bending point in an array of flash memory cells, a plurality of test flash memory cells are formed with each test flash memory cell having a respective floating gate structure designed to be disposed a respective displacement distance from a respective gate stack bending point. An erase operation is performed for each of the test flash memory cells by biasing the test flash memory cells with voltages from a plurality of voltage sources. Each of the test flash memory cells are then biased with test voltages from the plurality of voltage sources. A respective current meter then measures a respective amount of current flowing through each of the test flash memory cells when biased with the test voltages. The level of misalignment is determined depending on which of the test flash memory cells conducts a current level that is greater than a threshold current level when biased with the test voltages. The level of misalignment is approximately equal to a highest one of the respective displacement distance corresponding to one of the test flash memory cells that conducts a current level that is greater than the threshold current level.

Abstract translation: 为了电气地确定最靠近闪速存储器单元阵列中的栅堆叠弯曲点的浮栅结构的未对准电平，形成多个测试闪存单元，每个测试闪速存储单元具有相应的浮栅结构，其设计为 从相应的栅堆叠弯曲点设置相应的位移距离。 通过利用来自多个电压源的电压偏置测试闪存单元，对每个测试闪存单元执行擦除操作。 然后每个测试闪存单元被来自多个电压源的测试电压偏置。 然后，相应的电流表随着测试电压的偏差测量流过每个测试闪存单元的相应电流量。 根据测试闪速存储器单元中的哪一个导通当被测试电压偏置时大于阈值电流电平的电流电平来确定未对准电平。 未对准的电平近似等于对应于传导大于阈值电流电平的电流电平的测试闪存单元之一的相应位移距离中的最高一个。