公开(公告)号：US20240296890A1

公开(公告)日：2024-09-05

申请号：US18662709

申请日：2024-05-13

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Chen-Ming Huang ,  Wen-Tuo Huang ,  Yu-Hsiang Yang ,  Yu-Ling Hsu ,  Wei-Lin Chang ,  Chia-Sheng Lin ,  ShihKuang Yang ,  Yu-Chun Chang ,  Hung-Ling Shih ,  Po-Wei Liu ,  Shih-Hsien Chen

IPC分类号： G11C16/10 ,  G11C16/04 ,  H01L29/66 ,  H01L29/78 ,  H10B41/35

CPC分类号： G11C16/10 ,  H01L29/6656 ,  H01L29/7841 ,  H10B41/35 ,  G11C16/04

摘要： A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.

公开(公告)号：US20240127894A1

公开(公告)日：2024-04-18

申请号：US18515691

申请日：2023-11-21

申请人： Silicon Motion, Inc.

发明人： Tsung-Chieh Yang

IPC分类号： G11C16/26 ,  G11C16/04 ,  G11C16/06 ,  G11C16/34

CPC分类号： G11C16/26 ,  G11C16/04 ,  G11C16/0408 ,  G11C16/06 ,  G11C16/3418 ,  G11C16/3431 ,  G11C16/16

摘要： A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.

公开(公告)号：US11875854B2

公开(公告)日：2024-01-16

申请号：US17710683

申请日：2022-03-31

申请人： MACRONIX International Co., Ltd.

发明人： Teng Hao Yeh ,  Wu-Chin Peng ,  Chih-Ming Lin ,  Hang-Ting Lue

IPC分类号： G11C11/34 ,  G11C8/00 ,  G11C16/08 ,  G11C16/04 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30

CPC分类号： G11C16/08 ,  G11C16/04 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30

摘要： A memory device and a word line driver thereof are provided. The word line driver includes a first word line signal generator, a second word line signal generator, a first voltage generator, and a second voltage generator. The first word line signal generator selects one of a first voltage and a second voltage to generate a first word line signal according a control signal. The second word line signal generator selects one of a third voltage and a fourth voltage to generate a second word line signal according the control signal. The first voltage generator provides the second voltage, and the second voltage generator provides the fourth voltage, where the first voltage generator is independent to the second voltage generator.

公开(公告)号：US11830557B2

公开(公告)日：2023-11-28

申请号：US17462013

申请日：2021-08-31

申请人： Winbond Electronics Corp.

发明人： Zhe-Yi Lin

IPC分类号： G11C16/30 ,  H02M3/07 ,  G11C16/04

CPC分类号： G11C16/30 ,  G11C16/04 ,  H02M3/07

摘要： The invention provides a memory apparatus including a memory cell array and a voltage generation circuit. The voltage generation circuit is electrically connected to the memory cell array and includes an active voltage circuit and a sensing circuit. The active voltage circuit is configured to output an operating voltage to the memory cell array when the memory apparatus is in an active mode. The sensing circuit is configured to sense the operating voltage when the memory apparatus is in a standby mode and briefly activate the active voltage circuit to pull up the operating voltage after the operating voltage drops below a threshold.

公开(公告)号：US20230350609A1

公开(公告)日：2023-11-02

申请号：US18345124

申请日：2023-06-30

申请人： Samsung Electronics Co., Ltd.

发明人： Jesuk YEON ,  Seontaek KIM ,  Young-Ho PARK ,  Eun Ju CHOI ,  Yonghwa LEE

IPC分类号： G06F3/06 ,  G11C16/04 ,  G06F12/10 ,  G11C7/10 ,  G11C16/14 ,  G06F12/0802 ,  G06F3/16 ,  H10B43/20

CPC分类号： G06F3/0679 ,  G06F3/0659 ,  G06F3/061 ,  G06F3/0629 ,  G06F3/064 ,  G11C16/04 ,  G06F12/10 ,  G11C7/1015 ,  G11C7/1084 ,  G11C16/14 ,  G06F12/0802 ,  G06F3/0688 ,  G06F3/167 ,  G06F3/0611 ,  H10B43/20 ,  G11C16/26

摘要： A storage device includes a nonvolatile memory device; and a controller configured to, sequentially receive first read commands and a first write command, the first write command being associated with first write data, slice the first write command to generate a plurality of sub-commands, slice the first write data to generate a plurality of sub-data elements, and alternately transmit, to the nonvolatile memory device, at least one read command of the first read commands, and one sub-command of the plurality of sub-commands and one sub-data element of the plurality of sub-data elements.

公开(公告)号：US11735230B2

公开(公告)日：2023-08-22

申请号：US17565713

申请日：2021-12-30

申请人： Kioxia Corporation

发明人： Masato Sugita ,  Naoki Kimura ,  Daisuke Kimura

IPC分类号： G11C5/00 ,  G11C5/04 ,  G06F16/9535 ,  G11C5/06 ,  G11C5/02 ,  G11C16/04 ,  G11C14/00 ,  G06F13/42

CPC分类号： G11C5/04 ,  G06F13/4282 ,  G06F16/9535 ,  G11C5/02 ,  G11C5/06 ,  G11C5/063 ,  G11C14/0018 ,  G11C16/04 ,  G06F2213/0032

摘要： According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.

公开(公告)号：US11727993B2

公开(公告)日：2023-08-15

申请号：US17864674

申请日：2022-07-14

申请人： Kioxia Corporation

发明人： Hiroshi Maejima

IPC分类号： G11C16/04 ,  G11C16/10 ,  G11C5/02 ,  G11C5/06 ,  G11C16/08 ,  G11C16/34

CPC分类号： G11C16/10 ,  G11C5/02 ,  G11C5/063 ,  G11C16/04 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/3418 ,  G11C16/3422

摘要： A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks. The first block has a first cell unit which includes a memory cell to be programmed and a second cell unit which does not include a memory cell to be programmed, and programming is executed by applying a program potential or a transfer potential to word lines in the first block after the initial potential of channels of the memory cells in the first and second cell units is set to a plus potential. In the programming, the program potential and the transfer potential are not applied to word lines in the second block.

公开(公告)号：US20190243405A1

公开(公告)日：2019-08-08

申请号：US16342997

申请日：2017-10-03

申请人： ASAHI KASEI MICRODEVICES CORPORATION

发明人： Toshiro SAKAMOTO ,  Yuukou TSUSHIMA

IPC分类号： G05F3/24 ,  G11C16/30 ,  H01L27/11521 ,  H01L29/788 ,  H01L29/792

CPC分类号： G05F3/245 ,  G05F3/24 ,  G11C16/02 ,  G11C16/04 ,  G11C16/10 ,  G11C16/30 ,  H01L27/10 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/788 ,  H01L29/792

摘要： The object of the present invention is to provide a current source which is capable of suppressing an increase in circuit size and by which a highly accurate constant current extremely stable to manufacturing variations or temperature fluctuations can be obtained. A current source circuit is provided with a nonvolatile storage element having a control gate region and a source region and operating as a field-effect transistor, and is configured to output a current in a state where a bias is applied between the control gate region and the source region.

公开(公告)号：US20190172540A1

公开(公告)日：2019-06-06

申请号：US16251419

申请日：2019-01-18

申请人： Toshiba Memory Corporation

发明人： Hiroshi MAEJIMA

IPC分类号： G11C16/10 ,  G11C16/08 ,  G11C16/34 ,  G11C5/06 ,  G11C16/04 ,  G11C5/02

CPC分类号： G11C16/10 ,  G11C5/02 ,  G11C5/063 ,  G11C16/04 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/3418 ,  G11C16/3422

摘要： A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks. The first block has a first cell unit which includes a memory cell to be programmed and a second cell unit which does not include a memory cell to be programmed, and programming is executed by applying a program potential or a transfer potential to word lines in the first block after the initial potential of channels of the memory cells in the first and second cell units is set to a plus potential. In the programming, the program potential and the transfer potential are not applied to word lines in the second block.

公开(公告)号：US20190130979A1

公开(公告)日：2019-05-02

申请号：US16219144

申请日：2018-12-13

申请人： Micron Technology, Inc.

发明人： Sebastien Andre Jean

IPC分类号： G11C16/22 ,  G11C16/04

CPC分类号： G11C16/22 ,  G11C7/04 ,  G11C16/04 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26

摘要： Devices and techniques for increased NAND performance under high thermal conditions are disclosed herein. An indicator of a high-temperature thermal condition for a NAND device may be obtained. A workload of the NAND device may be measured in response to the high-temperature thermal condition. Operation of the NAND device may then be modified based on the workload and the high-temperature thermal condition.