Multi-processor reconfigurable computing system
    1.
    发明授权
    Multi-processor reconfigurable computing system 有权
    多处理器可重构计算系统

    公开(公告)号:US07779177B2

    公开(公告)日:2010-08-17

    申请号:US11195409

    申请日:2005-08-02

    申请人: Paul Chow

    发明人: Paul Chow

    IPC分类号: G06F3/00 G06F5/00 G06F15/76

    CPC分类号: G06F15/7867

    摘要: A reconfigurable multi-processor computing system including a plurality of configurable processing elements each having a plurality of integrated high-speed serial input/output ports. Interconnects link the plurality of processing elements, wherein at least one of the integrated high-speed serial input/output ports of each processing element is connected by at least one interconnect to at least one of the integrated high-speed serial input/output ports of each other processing element, thereby creating a full mesh network. The full mesh network is located on a processor card, multiples of which may be grouped in a shelf having a backplane card with a shelf controller card for providing cross-connects between processor cards. Multiple shelves may be interconnected to form a large computer system.

    摘要翻译: 一种可重新配置的多处理器计算系统,包括多个可配置的处理元件,每个具有多个集成的高速串行输入/输出端口。 互连链接多个处理元件,其中每个处理元件的集成高速串行输入/输出端口中的至少一个通过至少一个互连连接到集成的高速串行输入/输出端口中的至少一个 每个其他处理元素,从而创建一个完整的网状网络。 全网状网络位于处理器卡上,其中的多个网络可以被分组在具有带有用于提供处理器卡之间的交叉连接的搁板控制器卡的背板卡的架子中。 多个货架可以相互连接,形成一个大型的计算机系统。

    Multi-processor reconfigurable computing system
    2.
    发明申请
    Multi-processor reconfigurable computing system 有权
    多处理器可重构计算系统

    公开(公告)号:US20060031659A1

    公开(公告)日:2006-02-09

    申请号:US11195409

    申请日:2005-08-02

    申请人: Paul Chow

    发明人: Paul Chow

    IPC分类号: G06F15/00

    CPC分类号: G06F15/7867

    摘要: A reconfigurable multi-processor computing system including a plurality of configurable processing elements each having a plurality of integrated high-speed serial input/output ports. Interconnects link the plurality of processing elements, wherein at least one of the integrated high-speed serial input/output ports of each processing element is connected by at least one interconnect to at least one of the integrated high-speed serial input/output ports of each other processing element, thereby creating a full mesh network. The full mesh network is located on a processor card, multiples of which may be grouped in a shelf having a backplane card with a shelf controller card for providing cross-connects between processor cards. Multiple shelves may be interconnected to form a large computer system.

    摘要翻译: 一种可重新配置的多处理器计算系统,包括多个可配置的处理元件,每个具有多个集成的高速串行输入/输出端口。 互连链接多个处理元件,其中每个处理元件的集成高速串行输入/输出端口中的至少一个通过至少一个互连连接到集成的高速串行输入/输出端口中的至少一个 每个其他处理元素,从而创建一个完整的网状网络。 全网状网络位于处理器卡上,其中的多个网络可以被分组在具有带有用于提供处理器卡之间的交叉连接的搁板控制器卡的背板卡的架子中。 多个货架可以相互连接,形成一个大型的计算机系统。