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    TWO-LEVEL ARBITRATION IN A COMPUTING SYSTEM
    1.
    发明公开
    TWO-LEVEL ARBITRATION IN A COMPUTING SYSTEM 审中-公开

    公开(公告)号：US20240330236A1

    公开(公告)日：2024-10-03

    申请号：US18739272

    申请日：2024-06-10

    申请人： SambaNova Systems, Inc.

    发明人： Manish K. SHAH ,  John Philipp BAXLEY

    IPC分类号： G06F15/78

    CPC分类号： G06F15/7867

    摘要： A computing system includes a first network, a second network, multiple first agents connected to the first network, multiple second agents connected to the second network, and an interface circuit interconnecting the two networks. The interface circuit includes multiple request queues, a first arbiter for selecting requests from the second agents for transactions on the first network and entering them into the request queues, and credit counters associated with the first agents. A second arbiter selects requests from the oldest entry of each request queue based on the credit counters, sends transactions over the first network, and removes the selected requests from their respective queues. This system efficiently manages communication between the first and second networks, enhancing overall system performance.

    Context load mechanism in a coarse-grained reconfigurable array processor
    2.
    发明授权
    Context load mechanism in a coarse-grained reconfigurable array processor 有权

    公开(公告)号：US12038868B2

    公开(公告)日：2024-07-16

    申请号：US17899714

    申请日：2022-08-31

    申请人： Micron Technology, Inc.

    发明人： Bryan Hornung ,  Douglas Vanesko ,  David Patrick

    IPC分类号： G06F15/80 ,  G06F9/30 ,  G06F15/78

    CPC分类号： G06F15/80 ,  G06F9/30018 ,  G06F15/7867

    摘要： Devices and techniques for loading contexts in a coarse-grained reconfigurable array processor are described herein. A system or apparatus may include context load circuitry operable to load context for a coarse-grained reconfigurable array processor, where the context load circuitry is configured to: (a) receive a kernel identifier; (b) access a first registry to obtain a context mask base address; (c) determine a context mask address from the context mask base address and the kernel identifier; (d) access a second registry to obtain a context state base address; (e) determine a context state address from the context state base address and the kernel identifier; (f) use a context mask at the context mask address to determine corresponding active context state; and (g) load the corresponding active context state into the coarse-grained reconfigurable array processor.

    Avoiding Use of a Subarray of Configurable Units Having a Defect
    10.
    发明公开
    Avoiding Use of a Subarray of Configurable Units Having a Defect 审中-公开

    公开(公告)号：US20230393856A1

    公开(公告)日：2023-12-07

    申请号：US18236584

    申请日：2023-08-22

    申请人： SambaNova Systems, Inc.

    发明人： Gregory Frederick GROHOSKI ,  Manish K. SHAH ,  Kin Hing LEUNG

    IPC分类号： G06F9/4401 ,  G06F13/20 ,  G06F15/80 ,  G06F15/173 ,  G06F15/78 ,  G06F13/40

    CPC分类号： G06F9/4403 ,  G06F13/20 ,  G06F15/80 ,  G06F15/17343 ,  G06F15/7867 ,  G06F13/4022

    摘要： A computing system includes an array of configurable units made up of sub-arrays of configurable units. Each sub-array has a first number of configurable compute units and a second number of configurable memory units with a first spatial arrangement. Each configurable unit includes a configuration data store. The system also includes a statically configurable bus system coupled to the configurable units and a tag indicating a sub-array of configurable units having a defect. A defect-aware configuration controller sends configuration data to the configuration data stores to implement a data processing operation using the array of configurable units by generating static route control signals for the statically configurable bus system, based on the tag and without support of a host processor, to send a portion of the configuration data targeted to the sub-array having the defect to a configuration data store of an alternative sub-array of configurable units in the array.