公开(公告)号：US20090261417A1

公开(公告)日：2009-10-22

申请号：US12265603

申请日：2008-11-05

申请人： Yeh-Ning Jou ,  Hwa-Chyi Chiou

发明人： Yeh-Ning Jou ,  Hwa-Chyi Chiou

IPC分类号： H01L27/092

CPC分类号： H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： Trig modulation electrostatic discharge (ESD) protection devices are presented. An ESD protection device includes a semiconductor substrate. A high voltage N-well (HVNW) region is formed in the semiconductor substrate. An NDD region, a first P-body region and a second P-body region are formed in the HVNW region, wherein the first P-body region is separated from the second P-body region with a predetermined distance, and wherein the NDD region is isolated from the first P-body region with an isolation region. An N+ doped source region is disposed in the NDD region. An N+ doped region is disposed in the first P-body region. A P+ doped region is disposed in the second P-body region. A first gate is disposed between the N+ doped region and the isolation region, and a second gate is disposed between the N+ doped region and the P+ doped region.

摘要翻译： 提出了Trig调制静电放电（ESD）保护装置。 ESD保护器件包括半导体衬底。 在半导体衬底中形成高电压N阱（HVNW）区域。 在HVNW区域中形成NDD区域，第一P体区域和第二P体区域，其中，第一P体区域与第二P体区域以预定距离分离，并且其中NDD区域 与具有隔离区域的第一P体区隔离。 N +掺杂源区设置在NDD区中。 N +掺杂区域设置在第一P体区域中。 P +掺杂区域设置在第二P体区域中。 第一栅极设置在N +掺杂区域和隔离区域之间，第二栅极设置在N +掺杂区域和P +掺杂区域之间。