公开(公告)号：US09088403B1

公开(公告)日：2015-07-21

申请号：US14222913

申请日：2014-03-24

Applicant: APPLIED MICRO CIRCUTS CORPORATION

Inventor： Francesco Caggioni ,  Dimitrios Giannakopoulos

IPC: H04L7/00 ,  H04L7/02 ,  H04J3/06

CPC classification number: H04J3/0658 ,  H04L2007/045

Abstract: Various aspects provide for modifying a data stream for rate adaptation. A clock component receives a data stream at a first clock rate. In an aspect, a rate adaptation component inserts a first identification codeword into a particular location in the data stream based on a set of encoding rules in response to a determination that the first clock rate is lower than a second clock rate associated with a device configured for receiving a rate-adapted version of the data stream. In another aspect, the rate adaptation component removes a predefined codeword from the data stream and transforms another predefined codeword in the data stream into a second identification codeword in response to a determination that the first clock rate is greater than the second clock rate.

Abstract translation: 各种方面提供用于修改用于速率适配的数据流。 时钟分量以第一时钟速率接收数据流。 在一方面，速率适配组件响应于第一时钟速率低于与配置的设备相关联的第二时钟速率的确定，基于一组编码规则将第一标识码字插入数据流中的特定位置 用于接收数据流的速率适配版本。 在另一方面，响应于第一时钟速率大于第二时钟速率的确定，速率自适应组件从数据流中去除预定义的码字，并将数据流中的另一个预定码字变换为第二标识码字。

公开(公告)号：US09059723B1

公开(公告)日：2015-06-16

申请号：US14466316

申请日：2014-08-22

Applicant: APPLIED MICRO CIRCUTS CORPORATION

Inventor： Ramesh Kumar Singh ,  Tarun Gupta

IPC: H03M1/12 ,  H03M1/08 ,  H03M1/66

CPC classification number: H03M1/0836 ,  H03M1/0863 ,  H03M1/742

Abstract: Provided is a digital-to-analog converter configured to mitigate data dependent jitter of switch driver signals. The digital-to-analog converter is configured to produce data patterns of “0001000”. The digital-to-analog converter includes a digital portion that includes a digital data input component, an analog portion, and a conversion component. The conversion component includes a decoder configured to split a first data stream comprising a set of digital data into a first data sub-stream and a second data sub-stream, and a second data stream comprising another set of digital data into a third data sub-stream and a fourth data sub-stream. The conversion component also includes a first pair of drivers, a second pair of drivers, a third pair of drivers, and a fourth pair of drivers, wherein respective drivers of the first, second, third, and fourth pairs of drivers are configured to output respective data patterns comprising at least three consecutive identical bits.

Abstract translation: 提供了一种数模转换器，配置为减轻开关驱动器信号的数据相关抖动。 数模转换器被配置为产生“0001000”的数据模式。 数模转换器包括数字部分，其包括数字数据输入部件，模拟部分和转换部件。 转换组件包括：解码器，被配置为将包括一组数字数据的第一数据流分解成第一数据子流和第二数据子流，以及第二数据流，其包括另一组数字数据到第三数据子 流和第四数据子流。 转换组件还包括第一对驱动器，第二对驱动器，第三对驱动器和第四对驱动器，其中第一，第二，第三和第四对驱动器的相应驱动器被配置为输出 相应的数据模式包括至少三个连续相同的位。