Rail-to-rail-input buffer
    1.
    发明授权
    Rail-to-rail-input buffer 有权
    轨到轨输入缓冲区

    公开(公告)号:US07157970B2

    公开(公告)日:2007-01-02

    申请号:US10927947

    申请日:2004-08-27

    申请人: Alan Dawes

    发明人: Alan Dawes

    IPC分类号: H03F3/45

    CPC分类号: H03F3/45112

    摘要: A rail-to-rail-Input Buffer with constant mutual conductance includes a differential input; a first differential stage supplied with a first reference current; a second differential stage supplied with a second reference current; a switching PMOS-transistor which switches through when the input signal is higher than a first threshold voltage to divert the first reference current to a first current mirror circuit; a switching NMOS-transistor which switches through when an input signal is lower than a second threshold voltage to divert the second reference current to a second current mirror circuit; a third differential stage supplied with the mirrored first reference current and replaces the first differential stage when the input signal is higher than the first threshold voltage; and a fourth differential stage supplied with the mirrored second reference current and replaces the second differential stage when the input signal is lower than the second threshold voltage.

    摘要翻译: 具有恒定互导性的轨到轨输入缓冲器包括差分输入; 提供有第一参考电流的第一差分级; 提供有第二参考电流的第二差分级; 开关PMOS晶体管,当所述输入信号高于第一阈值电压时切换,以将所述第一参考电流转移到第一电流镜像电路; 切换NMOS晶体管,当输入信号低于第二阈值电压时切换,以将第二参考电流转移到第二电流镜电路; 第三差分级,其被提供有镜像的第一参考电流,并且当输入信号高于第一阈值电压时,替换第一差分级; 以及第四差分级,其被提供有镜像的第二参考电流,并且当输入信号低于第二阈值电压时,替换第二差分级。

    Electronic circuit
    2.
    发明授权
    Electronic circuit 有权
    电子电路

    公开(公告)号:US06333673B2

    公开(公告)日:2001-12-25

    申请号:US09739635

    申请日:2000-12-20

    申请人: Alan Dawes

    发明人: Alan Dawes

    IPC分类号: H03F102

    摘要: A switched capacitor anplifier circuit is provided with two independent reference voltages, one which provides an appropriate bias level for the amplifiers, and one which sets a common mode input level for the amplifiers, thereby allowing the dynamic range to be maximized.

    摘要翻译: 开关电容器放大器电路具有两个独立的参考电压,一个为放大器提供适当的偏置电平,另一个用于为放大器设置共模输入电平,从而允许动态范围最大化。

    Rail-to-rail-input buffer
    3.
    发明申请
    Rail-to-rail-input buffer 有权
    轨到轨输入缓冲区

    公开(公告)号:US20050083124A1

    公开(公告)日:2005-04-21

    申请号:US10927947

    申请日:2004-08-27

    申请人: Alan Dawes

    发明人: Alan Dawes

    IPC分类号: H03F3/45

    CPC分类号: H03F3/45112

    摘要: Rail-to-rail-Input Buffer with constant mutual conductance comprising a differential input having a first input terminal and a second input terminal for applying an input signal; a first differential stage supplied with a first reference current, wherein the first differential stage is formed by PMOS-transistors having gate terminals connected to the input terminals; a second differential stage supplied with a second reference current wherein the second differential stage is formed by NMOS-transistors having gate terminals connected to the input terminals; a switching PMOS-transistor which switches through when the input signal is higher than a predetermined first threshold voltage to divert the first reference current supplied to the first differential stage to a first current mirror circuit which mirrors the first reference current; a switching NMOS-transistor which switches through when the input signal is lower than a predetermined second threshold voltage to divert the second reference current supplied to the second differential stage to a second current mirror circuit which mirrors the second reference current; a third differential stage formed by NMOS-transistors having gate terminals connected to the input terminals; wherein the third differential stage is supplied with the mirrored first reference current and replaces the first differential stage when the input signal is higher than the first threshold voltage; and a fourth differential stage formed by PMOS-transistors having gate terminals connected to the input terminals; wherein the fourth differential stage is supplied with the mirrored second reference current and replaces the second differential stage when the input signal is lower than the second threshold voltage.

    摘要翻译: 具有恒定互导的轨至轨输入缓冲器,包括具有用于施加输入信号的第一输入端和第二输入端的差分输入; 提供有第一参考电流的第一差分级,其中所述第一差分级由具有连接到所述输入端的栅极端子的PMOS晶体管形成; 提供有第二参考电流的第二差分级,其中第二差分级由具有连接到输入端的栅极端子的NMOS晶体管形成; 开关PMOS晶体管,当所述输入信号高于预定的第一阈值电压时切换,以将提供给所述第一差分级的所述第一参考电流转移到第一参考电流,所述第一电流镜电路反射所述第一参考电流; 切换NMOS晶体管,其在输入信号低于预定的第二阈值电压时切换,以将提供给第二差分级的第二参考电流转换成镜像第二参考电流的第二电流镜电路; 由具有连接到输入端的栅极端子的NMOS晶体管形成的第三差分级; 其中所述第三差分级被提供所述镜像的第一参考电流,并且当所述输入信号高于所述第一阈值电压时,替换所述第一差分级; 以及由栅极端子连接到所述输入端的PMOS晶体管形成的第四差分级; 其中第四差分级被提供有镜像的第二参考电流,并且当输入信号低于第二阈值电压时,替换第二差分级。