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公开(公告)号:US20050286299A1
公开(公告)日:2005-12-29
申请号:US11116440
申请日:2005-04-28
申请人: Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Jacob , Avi Parvin , Noam Eshel
发明人: Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Jacob , Avi Parvin , Noam Eshel
CPC分类号: G11C16/3454
摘要: In conventional memory arrays in which a bit line is shared by memory cells, a cell current flows over into neighbor cell(s) in a program verify process, and therefore, the threshold of a memory cell to be programmed is erroneously determined to be lower. Therefore, in a program verify process, a control circuit 3 writes a fail value to a neighbor cell buffer 5 when all neighbor cell(s) having an offset of n or less from a memory cell to be programmed are in the erased state, and when otherwise, writes a pass value to the neighbor cell buffer 5. The control circuit 3 verifies input write data and also verifies data stored in the neighbor cell buffer(s). In the latter verify process, a verify voltage higher than an ordinary one is used to compensate for the leakage of cell current.
摘要翻译: 在存储器单元共享位线的常规存储器阵列中,在程序验证过程中,单元电流流过相邻单元,因此,要被编程的存储器单元的阈值被错误地确定为较低 。 因此,在程序验证处理中,当从要被编程的存储单元的偏移量为n以下的所有相邻单元都处于被擦除状态时,控制电路3向相邻单元缓冲器5写入失败值, 否则,将通过值写入邻居单元缓冲器5。 控制电路3验证输入写入数据,并验证存储在相邻单元缓冲器中的数据。 在后一验证过程中,使用高于常规验证电压的验证电压来补偿电池电流的泄漏。
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公开(公告)号:US07313649B2
公开(公告)日:2007-12-25
申请号:US11116440
申请日:2005-04-28
申请人: Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Allan Jacob , Avi Parvin , Noam Eshel
发明人: Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Allan Jacob , Avi Parvin , Noam Eshel
IPC分类号: G06F12/00
CPC分类号: G11C16/3454
摘要: In conventional memory arrays in which a bit line is shared by memory cells, a cell current flows over into neighbor cell(s) in a program verify process, and therefore, the threshold of a memory cell to be programmed is erroneously determined to be lower. Therefore, in a program verify process, a control circuit 3 writes a fail value to a neighbor cell buffer 5 when all neighbor cell(s) having an offset of n or less from a memory cell to be programmed are in the erased state, and when otherwise, writes a pass value to the neighbor cell buffer 5. The control circuit 3 verifies input write data and also verifies data stored in the neighbor cell buffer(s). In the latter verify process, a verify voltage higher than an ordinary one is used to compensate for the leakage of cell current.
摘要翻译: 在存储器单元共享位线的常规存储器阵列中,在程序验证过程中,单元电流流过相邻单元,因此,要被编程的存储器单元的阈值被错误地确定为较低 。 因此,在程序验证处理中,当从要被编程的存储单元的偏移量为n以下的所有相邻单元都处于被擦除状态时,控制电路3向相邻单元缓冲器5写入失败值, 否则,将通过值写入邻居单元缓冲器5。 控制电路3验证输入写入数据,并验证存储在相邻单元缓冲器中的数据。 在后一验证过程中,使用高于常规验证电压的验证电压来补偿电池电流的泄漏。
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