公开(公告)号：US5835738A

公开(公告)日：1998-11-10

申请号：US668530

申请日：1996-06-24

申请人： John Wiley Blackledge, Jr. ,  Bechara Boury ,  Bradly George Frey ,  James D. Reid ,  Ronald Valli

发明人： John Wiley Blackledge, Jr. ,  Bechara Boury ,  Bradly George Frey ,  James D. Reid ,  Ronald Valli

IPC分类号： G06F13/36 ,  G06F13/40 ,  H04L12/46 ,  H04L29/12 ,  G06F13/00

CPC分类号： H04L61/00 ,  G06F13/404 ,  H04L12/46 ,  H04L29/12009

摘要： An information processing system comprises a processor, a first bus for conducting signals in accordance with a first bus protocol that does not support I/O address signals; a second bus for conducting signals in accordance with a second bus protocol that supports input/output (I/O) address signals; and a bridge circuit for coupling the first bus to the second bus. The processor includes a circuit for emitting address signals and an address type signal directed to a selected peripheral device. The bridge circuit comprises a filter for determining whether the address signal emitted by the processor corresponds to a peripheral device coupled to a bus subordinate to the bridge circuit; and a translation circuit, coupled to the filter, for translating signals in accordance with the first bus protocol to signals in accordance with the second bus protocol for transmission to the selected peripheral device.

摘要翻译： 信息处理系统包括处理器，用于根据不支持I / O地址信号的第一总线协议进行信号的第一总线; 用于根据支持输入/输出（I / O）地址信号的第二总线协议进行信号的第二总线; 以及用于将第一总线耦合到第二总线的桥接电路。 处理器包括用于发射地址信号的电路和指向所选外围设备的地址类型信号。 桥接电路包括一个滤波器，用于确定由处理器发出的地址信号是否对应于耦合到从属于该桥接电路的总线的外围设备; 以及耦合到所述滤波器的翻译电路，用于将根据所述第一总线协议的信号转换为根据所述第二总线协议的信号以传输到所选择的外围设备。