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    LDMOS and CMOS integrated circuit and method of making
    1.
    发明申请
    LDMOS and CMOS integrated circuit and method of making 失效
    LDMOS和CMOS集成电路及其制作方法

    公开(公告)号：US20050041070A1

    公开(公告)日：2005-02-24

    申请号：US10954065

    申请日：2004-09-28

    申请人： Zhizang Chen ,  Bao-Sung Bruce Yeh ,  S. Jonathan Wang ,  Cathy Peltier

    发明人： Zhizang Chen ,  Bao-Sung Bruce Yeh ,  S. Jonathan Wang ,  Cathy Peltier

    IPC分类号： H01L21/8238 ,  B41J2/05

    CPC分类号： H01L21/823892 ,  H01L21/823807 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit (IC) is formed on a substrate. The IC has a first well having a first dopant concentration that includes a second conductivity low-voltage transistor. The IC also has a second well having a dopant concentration equal to the first dopant concentration that includes a first conductivity high-voltage transistor. In addition, the IC has a third well having a second dopant concentration of an opposite type than the first well that includes a first conductivity low-voltage transistor. The first conductivity low-voltage transistor and the second conductivity low-voltage transistor are created without a threshold voltage (Vt) implant.

    摘要翻译： 在基板上形成集成电路（IC）。 IC具有第一阱，其具有包括第二导电低压晶体管的第一掺杂剂浓度。 IC还具有掺杂浓度等于包括第一导电高压晶体管的第一掺杂剂浓度的第二阱。 此外，IC具有第三阱，其具有与包括第一导电低压晶体管的第一阱相反类型的第二掺杂剂浓度。 产生第一导电低压晶体管和第二导电低压晶体管，而没有阈值电压（Vt）植入。