APPARATUS, METHOD, AND SYSTEM FOR HARDWARE MAPPING AND MANAGEMENT

    公开(公告)号:US20180290291A1

    公开(公告)日:2018-10-11

    申请号:US15943260

    申请日:2018-04-02

    Abstract: An Apparatus, Method, and System for Hardware Mapping and Management is disclosed. Apparatus comprises a substrate housing hardware units associated with an object; one or more holes within the substrate for housing at least one hardware unit of the object are positioned based on a layout corresponding to the hardware units' assembly within the object. A method providing a plurality of substrates for housing hardware comprised of at least two components and at least two hardware units for each component, configuring a first plurality of holes within a first substrate of the plurality of substrate, wherein the first plurality of holes are laid out within the first substrate at locations relative the location of hardware units within a first component, and configuring a second plurality of holes within a second substrate of the plurality of substrate, wherein the second plurality of holes are laid out within the second substrate at locations relative the location of hardware units within a second component.

    Apparatus, method, and system for hardware mapping and management

    公开(公告)号:US10471586B2

    公开(公告)日:2019-11-12

    申请号:US15943260

    申请日:2018-04-02

    Abstract: An Apparatus, Method, and System for Hardware Mapping and Management is disclosed. Apparatus comprises a substrate housing hardware units associated with an object; one or more holes within the substrate for housing at least one hardware unit of the object are positioned based on a layout corresponding to the hardware units' assembly within the object. A method providing a plurality of substrates for housing hardware comprised of at least two components and at least two hardware units for each component, configuring a first plurality of holes within a first substrate of the plurality of substrate, wherein the first plurality of holes are laid out within the first substrate at locations relative the location of hardware units within a first component, and configuring a second plurality of holes within a second substrate of the plurality of substrate, wherein the second plurality of holes are laid out within the second substrate at locations relative the location of hardware units within a second component.

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