Apparatus and method for decoding LDPC code based on prototype parity check matrixes
    1.
    发明授权
    Apparatus and method for decoding LDPC code based on prototype parity check matrixes 失效
    基于原型奇偶校验矩阵对LDPC码进行解码的装置和方法

    公开(公告)号:US08214717B2

    公开(公告)日:2012-07-03

    申请号:US12166866

    申请日:2008-07-02

    IPC分类号: H03M13/00

    摘要: Provided is an apparatus and method for decoding a Low Density Parity Check (LDPC) code based on prototype parity check matrixes. The apparatus, includes: a parity check matrix selecting means for determining multiple prototype parity check matrixes according to a sub-matrix size and a parallelization figure for processing the parity check matrix; a bit input means for receiving a log likelihood probability value for input bit according to the sub-matrix size and the parallelization figure; a check matrix process means for sequentially performing a partial parallel process on the parity check matrix based on the received log likelihood probability value and the determined multiple prototype parity check matrixes; and a bit process means for determining a bit level based on the partial-parallel processed parity check matrix value and recovering the input bit according to the sub-matrix size and the parallelization figure.

    摘要翻译: 提供了一种基于原型奇偶校验矩阵对低密度奇偶校验(LDPC)码进行解码的装置和方法。 该装置包括:奇偶校验矩阵选择装置,用于根据子矩阵大小确定多个原型奇偶校验矩阵;以及用于处理奇偶校验矩阵的并行化图; 用于根据子矩阵大小和并行化图形接收输入比特的对数似然概率值的位输入装置; 校验矩阵处理装置,用于基于所接收的对数似然概率值和所确定的多原型奇偶校验矩阵,顺序对奇偶校验矩阵执行部分并行处理; 以及位处理装置,用于基于部分并行处理的奇偶校验矩阵值确定位电平,并根据子矩阵大小和并行化图形恢复输入位。

    APPARATUS AND METHOD FOR DECODING LDPC CODE BASED ON PROTOTYPE PARITY CHECK MATRIXES
    2.
    发明申请
    APPARATUS AND METHOD FOR DECODING LDPC CODE BASED ON PROTOTYPE PARITY CHECK MATRIXES 失效
    基于原型奇偶校验矩阵来解码LDPC码的装置和方法

    公开(公告)号:US20090158121A1

    公开(公告)日:2009-06-18

    申请号:US12166866

    申请日:2008-07-02

    IPC分类号: H03M13/05 G06F11/07

    摘要: Provided is an apparatus and method for decoding a Low Density Parity Check (LDPC) code based on prototype parity check matrixes. The apparatus, includes: a parity check matrix selecting means for determining multiple prototype parity check matrixes according to a sub-matrix size and a parallelization figure for processing the parity check matrix; a bit input means for receiving a log likelihood probability value for input bit according to the sub-matrix size and the parallelization figure; a check matrix process means for sequentially performing a partial parallel process on the parity check matrix based on the received log likelihood probability value and the determined multiple prototype parity check matrixes; and a bit process means for determining a bit level based on the partial-parallel processed parity check matrix value and recovering the input bit according to the sub-matrix size and the parallelization figure.

    摘要翻译: 提供了一种基于原型奇偶校验矩阵对低密度奇偶校验(LDPC)码进行解码的装置和方法。 该装置包括:奇偶校验矩阵选择装置,用于根据子矩阵大小确定多个原型奇偶校验矩阵;以及用于处理奇偶校验矩阵的并行化图; 用于根据子矩阵大小和并行化图形接收输入比特的对数似然概率值的位输入装置; 校验矩阵处理装置,用于基于所接收的对数似然概率值和所确定的多原型奇偶校验矩阵,顺序对奇偶校验矩阵执行部分并行处理; 以及位处理装置,用于基于部分并行处理的奇偶校验矩阵值确定位电平,并根据子矩阵大小和并行化图形恢复输入位。