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    HIGHLY EFFICIENT THERMOELECTRIC MATERIAL
    2.
    发明申请
    HIGHLY EFFICIENT THERMOELECTRIC MATERIAL 审中-公开
    高效热电材料

    公开(公告)号：US20130112909A1

    公开(公告)日：2013-05-09

    申请号：US13534243

    申请日：2012-06-27

    申请人： Chien-Neng Liao ,  Hung-Hsien Huang ,  Li-Chieh Wu ,  Sin-Shien Lin ,  Meng-Pei Lu ,  Chien-Hao Chiu

    发明人： Chien-Neng Liao ,  Hung-Hsien Huang ,  Li-Chieh Wu ,  Sin-Shien Lin ,  Meng-Pei Lu ,  Chien-Hao Chiu

    IPC分类号： C09K3/00

    CPC分类号： H01L35/12

    摘要： A highly efficient thermoelectric material with one end coated in silver adhesive and placed in a high temperature furnace to heat and diffuse the silver adhesive into the homogeneous thermoelectric material, thereby producing an non-uniform thermoelectric material one-side doped thermoelectric material. The non-uniform thermoelectric material one-side doped thermoelectric material is able to achieve a high thermoelectric figure of merit.

    摘要翻译： 一种高效率的热电材料，其一端涂覆有银粘合剂并放置在高温炉中以将银粘合剂加热并扩散到均匀的热电材料中，由此产生不均匀的热电材料单侧掺杂的热电材料。 不均匀的热电材料单侧掺杂热电材料能够实现高的热电性能。

    Dead-time locking circuit
    3.
    发明申请
    Dead-time locking circuit 有权

    公开(公告)号：US20100085118A1

    公开(公告)日：2010-04-08

    申请号：US12326047

    申请日：2008-12-01

    申请人： Chien-Hao Chiu

    发明人： Chien-Hao Chiu

    IPC分类号： H03F3/217

    CPC分类号： H03F3/2171

    摘要： The dead-time locking circuit includes phase detector and a delay-comparator. The delay-comparator includes two input ends for receiving phase adjusting signal and the input-exchanging signal received by the class D amplifier. After comparing, the delay-comparator outputs a gate driving signal. The phase detector detects the phase difference between the output signal of the class D amplifier and the gate driving signal of the power transistor of the class D amplifier, and accordingly adjusts the rising/falling edges of the gate driving signal outputted from and the comparator via the charge-pump. In this way, the dead-time can be locked at the predetermined value.

    Dead-time locking circuit
    4.
    发明授权
    Dead-time locking circuit 有权
    死时锁定电路

    公开(公告)号：US07804360B2

    公开(公告)日：2010-09-28

    申请号：US12326047

    申请日：2008-12-01

    申请人： Chien-Hao Chiu

    发明人： Chien-Hao Chiu

    IPC分类号： H03F3/217

    CPC分类号： H03F3/2171

    摘要： The dead-time locking circuit includes phase detector and a delay-comparator. The delay-comparator includes two input ends for receiving phase adjusting signal and the input-exchanging signal received by the class D amplifier. After comparing, the delay-comparator outputs a gate driving signal. The phase detector detects the phase difference between the output signal of the class D amplifier and the gate driving signal of the power transistor of the class D amplifier, and accordingly adjusts the rising/falling edges of the gate driving signal outputted from and the comparator via the charge-pump. In this way, the dead-time can be locked at the predetermined value.

    摘要翻译： 死区锁定电路包括相位检测器和延迟比较器。 延迟比较器包括用于接收相位调整信号和由D类放大器接收的输入交换信号的两个输入端。 比较后，延迟比较器输出门驱动信号。 相位检测器检测D类放大器的输出信号和D类放大器的功率晶体管的栅极驱动信号之间的相位差，并且因此调节从和比较器输出的栅极驱动信号的上升/下降沿 电荷泵。 以这种方式，死区时间可以锁定在预定值。