公开(公告)号：US07755712B2

公开(公告)日：2010-07-13

申请号：US11671010

申请日：2007-02-05

申请人： Chung-Hung Peng ,  Meng-Chieh Cheng ,  Chin-Fon Chen

发明人： Chung-Hung Peng ,  Meng-Chieh Cheng ,  Chin-Fon Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136259 ,  G02F2001/133388 ,  G02F2001/136263

摘要： An array substrate, and method for repairing thereof, and display panel and apparatus comprising the same are provided. The array substrate includes a base, a plurality of signal lines, and at least one repair structure. The base has an active region and a peripheral region adjoining to the active region. The signal lines are disposed on the base. The repair structure, is disposed on the peripheral region, and has at least one first repair line and at least one second repair line. The second repair line has a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line.

摘要翻译： 阵列基板及其修理方法以及包括该阵列基板的显示面板及装置。 阵列基板包括基底，多条信号线和至少一个修复结构。 基底具有与活性区相邻的有源区和周边区。 信号线设置在基座上。 修复结构设置在周边区域上，并且具有至少一个第一修复线和至少一个第二修复线。 第二修理线具有第一子线和第二子线。 第一条子线位于第一修理线和第二子线之间。

公开(公告)号：US08503601B2

公开(公告)日：2013-08-06

申请号：US13241590

申请日：2011-09-23

申请人： Po-Kai Wang ,  Chun-Hao Huang ,  Chung-Hung Peng

发明人： Po-Kai Wang ,  Chun-Hao Huang ,  Chung-Hung Peng

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/043 ,  G09G2330/04

摘要： A gate-on array shift register includes a signal-input unit, a control transistor and at least three stable modules. The signal-input unit receives and outputs a previous-stage output signal. The control terminal of the control transistor is electrically coupled to the signal-input unit for receiving the previous-stage output signal. The control transistor outputs corresponding output signal on output terminal of the shift register according to the previous-stage output signal. Each of the stable modules is electrically coupled to the control terminal of the control transistor and the output terminal of the shift register to stabilize voltage of the terminals.

摘要翻译： 栅极阵列移位寄存器包括信号输入单元，控制晶体管和至少三个稳定模块。 信号输入单元接收并输出前级输出信号。 控制晶体管的控制端子电耦合到信号输入单元，用于接收前级输出信号。 控制晶体管根据前级输出信号在移位寄存器的输出端输出相应的输出信号。 每个稳定模块电耦合到控制晶体管的控制端和移位寄存器的输出端，以稳定端子的电压。

公开(公告)号：US08077270B2

公开(公告)日：2011-12-13

申请号：US12761164

申请日：2010-04-15

申请人： Chung-Hung Peng ,  Meng-Chieh Cheng ,  Chin-Fon Chen

发明人： Chung-Hung Peng ,  Meng-Chieh Cheng ,  Chin-Fon Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136259 ,  G02F2001/133388 ,  G02F2001/136263

摘要： An array substrate includes: a base having an active region and a peripheral region adjoining to the active region; a plurality of signal lines disposed on the base; and at least one repair structure disposed on the peripheral region and having at least one first repair line and at least one second repair line having a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line. The signal lines have a plurality of groups; the first repair line crosses over at least two of the groups of the signal lines; and at least one of the groups of the signal lines is crossed over by only one of the first sub-line and the second sub-line.

摘要翻译： 阵列基板包括：具有有源区和与该有源区邻接的周边区的基极; 设置在基座上的多条信号线; 以及设置在所述周边区域上并且具有至少一个第一修复线和至少一个具有第一子线和第二子线的第二修复线的至少一个修复结构。 第一条子线位于第一修理线和第二子线之间。 信号线具有多个组; 第一个修复线穿过至少两个信号线组; 并且信号线的组中的至少一个被第一子线和第二子线中的仅一个交叉。

公开(公告)号：US20110278574A1

公开(公告)日：2011-11-17

申请号：US12824237

申请日：2010-06-28

申请人： Wen-Chi Chuang ,  Chung-Hung Peng ,  Tung-Tsun Lin ,  Ya-Ling Kuo

发明人： Wen-Chi Chuang ,  Chung-Hung Peng ,  Tung-Tsun Lin ,  Ya-Ling Kuo

IPC分类号： H01L33/08 ,  H01J9/50

CPC分类号： H01L27/0296 ,  H01L2251/568

摘要： An active device array substrate including a substrate, a plurality of pixels, a plurality of signal lines, and a repairing structure is provided. The substrate has a display region and a periphery region. The pixels are arranged on the display region of the substrate as an array. The signal lines are electrically connected to the pixels and are respectively extended from the display region to the periphery region. The repairing structure is disposed at the periphery region, and which includes a first repairing line, a second repairing line, an electrostatic discharge (ESD) releasing line, and an ESD protector. The first repairing line is intersected with one ends of the signal lines and is electrically floated. The ESD protector is connected between the second repairing line and the ESD releasing line, and the ESD protector is overlapped with and electrically insulated from the first repairing line.

摘要翻译： 提供了包括衬底，多个像素，多个信号线和修复结构的有源器件阵列衬底。 基板具有显示区域和外围区域。 像素被布置在基板的显示区域上作为阵列。 信号线电连接到像素并且分别从显示区域延伸到外围区域。 修复结构设置在周边区域，并且包括第一修复线，第二修复线，静电放电（ESD）释放线和ESD保护器。 第一个修理线与信号线的一端相交并电浮动。 ESD保护器连接在第二修理线和ESD释放线之间，并且ESD保护器与第一修复线重叠并与其电绝缘。

公开(公告)号：US07880856B2

公开(公告)日：2011-02-01

申请号：US11735506

申请日：2007-04-16

申请人： Chung-Hung Peng ,  Meng-ying Hsieh ,  Chi-Hung Lu ,  Chin-Fon Chen

发明人： Chung-Hung Peng ,  Meng-ying Hsieh ,  Chi-Hung Lu ,  Chin-Fon Chen

IPC分类号： G02F1/13

CPC分类号： G02F1/136259 ,  G01R31/025 ,  G02F2001/136254 ,  G02F2001/136272

摘要： A pixel unit including a pixel electrode, a scan electrode, a common voltage electrode, a data electrode and at least one redundancy electrode is provided. During the fabricating process of the pixel unit, if a particle is simultaneously located between any two of the pixel electrode, the scan electrode and the common voltage electrode, it would cause a short circuit between the two electrodes. The pixel unit can generate a cross-shaped defect signal at the location where a short circuit happens when the pixel unit undergoes an array test or a cell test. The user can thereby quickly locate the defect and repair it.

摘要翻译： 提供了包括像素电极，扫描电极，公共电压电极，数据电极和至少一个冗余电极的像素单元。 在像素单元的制造过程中，如果颗粒同时位于像素电极，扫描电极和公共电压电极中的任何两个之间，则会在两个电极之间引起短路。 像素单元可以在像素单元进行阵列测试或单元测试时在短路发生的位置处产生十字形缺陷信号。 因此，用户可以快速定位缺陷并对其进行修复。

公开(公告)号：US20080062347A1

公开(公告)日：2008-03-13

申请号：US11671010

申请日：2007-02-05

申请人： Chung-Hung Peng ,  Meng-Chieh Cheng ,  Chin-Fon Chen

发明人： Chung-Hung Peng ,  Meng-Chieh Cheng ,  Chin-Fon Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136259 ,  G02F2001/133388 ,  G02F2001/136263

摘要： An array substrate, and method for repairing thereof, and display panel and apparatus comprising the same are provided. The array substrate includes a base, a plurality of signal lines, and at least one repair structure. The base has an active region and a peripheral region adjoining to the active region. The signal lines are disposed on the base. The repair structure, is disposed on the peripheral region, and has at least one first repair line and at least one second repair line. The second repair line has a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line.

摘要翻译： 阵列基板及其修理方法以及包括该阵列基板的显示面板及装置。 阵列基板包括基底，多条信号线和至少一个修复结构。 基底具有与活性区相邻的有源区和周边区。 信号线设置在基座上。 修复结构设置在周边区域上，并且具有至少一个第一修复线和至少一个第二修复线。 第二修理线具有第一子线和第二子线。 第一条子线位于第一修理线和第二子线之间。

公开(公告)号：US20120093276A1

公开(公告)日：2012-04-19

申请号：US13241590

申请日：2011-09-23

申请人： Po-Kai WANG ,  Chun-Hao HUANG ,  Chung-Hung PENG

发明人： Po-Kai WANG ,  Chun-Hao HUANG ,  Chung-Hung PENG

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/043 ,  G09G2330/04

摘要： A gate-on array shift register includes a signal-input unit, a control transistor and at least three stable modules. The signal-input unit receives and outputs a previous-stage output signal. The control terminal of the control transistor is electrically coupled to the signal-input unit for receiving the previous-stage output signal. The control transistor outputs corresponding output signal on output terminal of the shift register according to the previous-stage output signal. Each of the stable modules is electrically coupled to the control terminal of the control transistor and the output terminal of the shift register to stabilize voltage of the terminals.

摘要翻译： 栅极阵列移位寄存器包括信号输入单元，控制晶体管和至少三个稳定模块。 信号输入单元接收并输出前级输出信号。 控制晶体管的控制端子电耦合到信号输入单元，用于接收前级输出信号。 控制晶体管根据前级输出信号在移位寄存器的输出端输出相应的输出信号。 每个稳定模块电耦合到所述控制晶体管的控制端子和所述移位寄存器的输出端，以稳定的终端电压。

公开(公告)号：US08059780B2

公开(公告)日：2011-11-15

申请号：US12848640

申请日：2010-08-02

申请人： Po-Kai Wang ,  Chun-Hao Huang ,  Chung-Hung Peng

发明人： Po-Kai Wang ,  Chun-Hao Huang ,  Chung-Hung Peng

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G2310/0283 ,  G09G2310/0286

摘要： An exemplary shift register circuit includes a shift register, a first switching circuit and a second switching circuit. The shift register has a start pulse signal input terminal and a start pulse signal output terminal. The first switching circuit includes a first input switch unit and a second output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. The second switching circuit includes a second input switch unit and a first output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. Moreover, on-off states of the first input and first output switch units are opposite to on-off states of the second input and second output switch units. Moreover, a gate driving circuit using the above-mentioned shift register and switching circuits also is provided.

摘要翻译： 示例性移位寄存器电路包括移位寄存器，第一开关电路和第二开关电路。 移位寄存器具有起始脉冲信号输入端和起始脉冲信号输出端。 第一开关电路包括分别电耦合到起始脉冲信号输入端和起始脉冲信号输出端的第一输入开关单元和第二输出开关单元。 第二开关电路包括分别电耦合到起始脉冲信号输入端和起始脉冲信号输出端的第二输入开关单元和第一输出开关单元。 此外，第一输入和第一输出开关单元的通断状态与第二输入和第二输出开关单元的开 - 关状态相反。 此外，还提供了使用上述移位寄存器和开关电路的栅极驱动电路。

公开(公告)号：US20110228894A1

公开(公告)日：2011-09-22

申请号：US12848640

申请日：2010-08-02

申请人： Po-Kai WANG ,  Chun-Hao Huang ,  Chung-Hung Peng

发明人： Po-Kai WANG ,  Chun-Hao Huang ,  Chung-Hung Peng

IPC分类号： G11C19/28

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G2310/0283 ,  G09G2310/0286

摘要： An exemplary shift register circuit includes a shift register, a first switching circuit and a second switching circuit. The shift register has a start pulse signal input terminal and a start pulse signal output terminal. The first switching circuit includes a first input switch unit and a second output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. The second switching circuit includes a second input switch unit and a first output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. Moreover, on-off states of the first input and first output switch units are opposite to on-off states of the second input and second output switch units. Moreover, a gate driving circuit using the above-mentioned shift register and switching circuits also is provided.

摘要翻译： 示例性移位寄存器电路包括移位寄存器，第一开关电路和第二开关电路。 移位寄存器具有起始脉冲信号输入端和起始脉冲信号输出端。 第一开关电路包括分别电耦合到起始脉冲信号输入端和起始脉冲信号输出端的第一输入开关单元和第二输出开关单元。 第二开关电路包括分别电耦合到起始脉冲信号输入端和起始脉冲信号输出端的第二输入开关单元和第一输出开关单元。 此外，第一输入和第一输出开关单元的通断状态与第二输入和第二输出开关单元的开 - 关状态相反。 此外，还提供了使用上述移位寄存器和开关电路的栅极驱动电路。

公开(公告)号：US08569759B2

公开(公告)日：2013-10-29

申请号：US12824237

申请日：2010-06-28

申请人： Wen-Chi Chuang ,  Chung-Hung Peng ,  Tung-Tsun Lin ,  Ya-Ling Kuo

发明人： Wen-Chi Chuang ,  Chung-Hung Peng ,  Tung-Tsun Lin ,  Ya-Ling Kuo

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00

CPC分类号： H01L27/0296 ,  H01L2251/568

摘要： An active device array substrate including a substrate, a plurality of pixels, a plurality of signal lines, and a repairing structure is provided. The substrate has a display region and a periphery region. The pixels are arranged on the display region of the substrate as an array. The signal lines are electrically connected to the pixels and are respectively extended from the display region to the periphery region. The repairing structure is disposed at the periphery region, and which includes a first repairing line, a second repairing line, an electrostatic discharge (ESD) releasing line, and an ESD protector. The first repairing line is intersected with one ends of the signal lines and is electrically floated. The ESD protector is connected between the second repairing line and the ESD releasing line, and the ESD protector is overlapped with and electrically insulated from the first repairing line.

摘要翻译： 提供了包括衬底，多个像素，多个信号线和修复结构的有源器件阵列衬底。 基板具有显示区域和外围区域。 像素被布置在基板的显示区域上作为阵列。 信号线电连接到像素并且分别从显示区域延伸到外围区域。 修复结构设置在周边区域，并且包括第一修复线，第二修复线，静电放电（ESD）释放线和ESD保护器。 第一个修理线与信号线的一端相交并电浮动。 ESD保护器连接在第二修理线和ESD释放线之间，并且ESD保护器与第一修复线重叠并与其电绝缘。