公开(公告)号：US07453131B2

公开(公告)日：2008-11-18

申请号：US10520849

申请日：2003-07-03

申请人： Gillian Fiona Marshall ,  David John Robbins ,  Weng Y Leong

发明人： Gillian Fiona Marshall ,  David John Robbins ,  Weng Y Leong

IPC分类号： H01L31/107

CPC分类号： H01L31/02027 ,  H01L27/14609 ,  H01L27/1464 ,  H01L27/14643

摘要： A photodetector circuit incorporates an APD detector structure (10) comprising a p− silicon handle wafer (12) on which a SiO2 insulation layer (14) is deposited in known manner. During manufacture a circular opening (16) is formed through the insulation layer (14) by conventional photolithography and etching, and an annular p+ substrate contact ring (18) is implanted in the handle wafer (12) after opening of the window (16). The APD itself is formed by implantation of a p region (20) and an n+ region (22). After the various implantation steps a metallisation layer is applied, and annular metal contacts are formed by the application of suitable photolithography and etching steps, these contacts comprising an annular contact (26) constituting the negative terminal and connected to the p+ substrate contact ring (18), an annular metal contact (28) constituting the positive terminal and connected to the n+ region (22) of the APD, and source and drain contacts (30) and (32) (not shown in FIG. 1) connected to the source and drain of one or more CMOS MOSFET devices of the associated CMOS readout circuitry fabricated within a Si layer (34) formed on top of the insulation layer (14). Such an arrangement overcomes the problem of combining APDs with CMOS circuits in that APDs operate at relatively high reverse bias (15-30V) and CMOS circuits operate at low voltage (SV), and the arrangement must be such as to prevent the high bias voltage from affecting the operation of adjacent CMOS transistors.

摘要翻译： 光电检测器电路包括APD检测器结构（10），其包括以已知方式沉积有SiO 2绝缘层（14）的p-硅处理晶片（12）。 在制造期间，通过常规光刻和蚀刻通过绝缘层（14）形成圆形开口（16），并且在打开窗口（16）之后，将环形p +衬底接触环（18）注入到处理晶片（12）中， 。 APD本身通过注入p区（20）和n +区（22）而形成。 在各种植入步骤之后，施加金属化层，并通过施加合适的光刻和蚀刻步骤形成环形金属触点，这些触点包括构成负极端子并连接到p +衬底接触环（18）的环形触点（26） ），构成正极端子并连接到APD的n +区域（22）的环形金属触点（28）以及连接到源极的源极和漏极触点（30）和（32）（未示出） 以及在形成在绝缘层（14）的顶部上的Si层（34）内制造的相关联的CMOS读出电路的一个或多个CMOS MOSFET器件的漏极。 这样一种布置克服了APD与CMOS电路的组合问题，因为APD在相对高的反向偏压（15-30V）下工作，CMOS电路在低电压（SV）下工作，并且这种布置必须能够防止高偏置电压 影响相邻CMOS晶体管的工作。