Abstract:
Disclosed is a loadboard that includes a plurality of channel pins that are arranged on the loadboard. The plurality of channel pins are electrically routed on the loadboard to a receptacle that is configured to receive I/O pins of an integrated circuit chip. The loadboard further includes a programming and test circuit that is integrated on the loadboard, and is coupled to a set of the plurality of channel pins to enable communication with the integrated circuit chip. The programming and test circuit includes a programming sub-circuit for communicating a plurality of voltage levels set by a programming vector to the integrated circuit chip, and a bias sub-circuit for communicating a plurality of bias voltage levels set by the programming vector to the integrated circuit chip.