公开(公告)号：US09679977B2

公开(公告)日：2017-06-13

申请号：US14861794

申请日：2015-09-22

申请人： Jin-bum Kim ,  Chul-sung Kim ,  Deok-han Bae ,  Bon-young Koo

发明人： Jin-bum Kim ,  Chul-sung Kim ,  Deok-han Bae ,  Bon-young Koo

IPC分类号： H01L29/41 ,  H01L29/78 ,  H01L27/092 ,  H01L21/82 ,  H01L29/417 ,  H01L29/66 ,  H01L29/165 ,  H01L21/8238

CPC分类号： H01L29/41783 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device may include a substrate including an NMOS region and a PMOS region, and having a protrusion pattern; first and second gate structures respectively formed on the NMOS region and the PMOS region of the substrate, crossing the protrusion pattern, and extending along a first direction that is parallel to an upper surface of the substrate; first and second source/drain regions formed on both sides of the first and second gate structures; and first and second contact plugs respectively formed on the first and second source/drain regions, wherein the first contact plug and the second contact plug are asymmetric. Methods of manufacturing are also provided.

公开(公告)号：US20160087053A1

公开(公告)日：2016-03-24

申请号：US14861794

申请日：2015-09-22

申请人： Jin-bum KIM ,  Chul-sung KIM ,  Deok-han BAE ,  Bon-young KOO

发明人： Jin-bum KIM ,  Chul-sung KIM ,  Deok-han BAE ,  Bon-young KOO

IPC分类号： H01L29/417 ,  H01L27/092 ,  H01L29/78 ,  H01L27/088

CPC分类号： H01L29/41783 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device may include a substrate including an NMOS region and a PMOS region, and having a protrusion pattern; first and second gate structures respectively formed on the NMOS region and the PMOS region of the substrate, crossing the protrusion pattern, and extending along a first direction that is parallel to an upper surface of the substrate; first and second source/drain regions formed on both sides of the first and second gate structures; and first and second contact plugs respectively formed on the first and second source/drain regions, wherein the first contact plug and the second contact plug are asymmetric. Methods of manufacturing are also provided.

摘要翻译： 半导体器件可以包括具有NMOS区域和PMOS区域的基板，并且具有突起图案; 第一和第二栅极结构分别形成在衬底的NMOS区域和PMOS区域上，与突起图案交叉并且沿着平行于衬底的上表面的第一方向延伸; 形成在第一和第二栅极结构的两侧上的第一和第二源极/漏极区域; 以及分别形成在第一和第二源极/漏极区域上的第一和第二接触插塞，其中第一接触插塞和第二接触插塞是不对称的。 还提供了制造方法。