公开(公告)号：US5991524A

公开(公告)日：1999-11-23

申请号：US835947

申请日：1997-04-14

Applicant: Krishna Belkhale ,  Sumit Roy ,  Devadas Varma

Inventor： Krishna Belkhale ,  Sumit Roy ,  Devadas Varma

IPC: G06F17/50

CPC classification number: G06F17/505

Abstract: Provided are a method, article of manufacture, and apparatus for identifying candidate clusters for matching to cells in a technology library. An automated design system comprises a computer configured to extract a portion of a circuit, levelize it, select a first node, identify the realizable clusters at the inputs of the first node, and combine the first node with realizable clusters at the inputs to produce candidate clusters. A dummy cluster is used at each input to represent using the input as a fanin. The system takes the cross product of the sets, and the first node is merged with each element of the cross product to produce a set of candidate clusters. The candidate clusters are then checked for realizability by comparing them to cells in the technology library, which includes dummy cells to facilitate mapping to large cells in the technology library. A set of realizable clusters is produced for the first node. The system applies the same process to successive nodes in the levelized circuit, including in the intermediate set the sets of realizable clusters for preceding nodes.

Abstract translation: 提供了用于识别与技术库中的单元匹配的候选聚类的方法，制品和装置。 一种自动化设计系统，包括：计算机，被配置为提取电路的一部分，使其平坦化，选择第一节点，识别在第一节点的输入端处的可实现集群，以及将第一节点与可实现的集群组合在一起以产生候选 集群。 在每个输入处使用虚拟集群来表示使用输入作为扇区。 系统采用集合的交叉乘积，并且第一节点与交叉产品的每个元素合并以产生一组候选集群。 然后通过将候选聚类与技术库中的单元进行比较来检查候选聚类，其中包括虚拟单元以便于映射到技术库中的大单元。 为第一个节点生成一组可实现的集群。 该系统将相同的过程应用到等级化电路中的连续节点，包括在中间设置前面节点的可实现集群集合。

公开(公告)号：US06672776B1

公开(公告)日：2004-01-06

申请号：US08818498

申请日：1997-03-14

Applicant: Johnson Chan Limqueco ,  Hong Li ,  Krishna Belkhale ,  Devadas Varma

Inventor： Johnson Chan Limqueco ,  Hong Li ,  Krishna Belkhale ,  Devadas Varma

IPC: G06F1750

CPC classification number: G06F17/505

Abstract: Provided are a method, article of manufacture, and apparatus for estimating delays of networks. An automated design system comprises a computer configured to identify a critical path in a network, calculate a delay for the technology-mapped version of the network, calculate a delay for the technology-independent version of the network, calculate a scale factor from the technology-mapped and technology-independent delays, and apply the scale factor to all the delays in the technology-independent network.

Abstract translation: 提供了一种用于估计网络延迟的方法，制造品和装置。 自动设计系统包括被配置为识别网络中的关键路径的计算机，计算网络的技术映射版本的延迟，计算与技术无关版本的网络的延迟，从该技术计算比例因子 和技术无关的延迟，并将比例因子应用于与技术无关的网络中的所有延迟。

公开(公告)号：US6023566A

公开(公告)日：2000-02-08

申请号：US837155

申请日：1997-04-14

Applicant: Krishna Belkhale ,  Sumit Roy ,  Devadas Varma

Inventor： Krishna Belkhale ,  Sumit Roy ,  Devadas Varma

IPC: G06F17/50 ,  G06F15/00

CPC classification number: G06F17/505

Abstract: Provided are a method, article of manufacture, and apparatus for matching candidate clusters to cells in a technology library. An automated design system comprises a computer configured to use second order signatures in generating candidate permutations of each permutation group in a canonical form of the candidate function. The system selects first and second symmetric subgroups, determines a second order signature for the candidate function and the first and second symmetric subgroups, and compares the second order signature to a corresponding second order signature for a library cell function. If the signatures match, the permutation is continued with the first and second symmetric subgroups being included in an intermediate permutation. If not, the system produces no more intermediate permutations beginning with the first and second symmetric subgroups. Further symmetric subgroups are added to the intermediate permutation. For each new symmetric subgroup, the system produces pairings of that symmetric subgroup with each of the symmetric subgroups in the intermediate permutation, and compares the second order signatures of the pairings to corresponding second order signatures in the library function. If at any time any of the second order signatures do not match their corresponding library function signatures, the system produces no more intermediate permutations beginning with the current sequence of the intermediate permutation, and instead removes the new symmetric subgroup and attempts to continue building the previous intermediate permutation. When all symmetric subgroups in the permutation group have been added to the intermediate permutation, the intermediate permutation becomes a candidate permutation.

Abstract translation: 提供了一种用于将候选群集与技术库中的小区相匹配的方法，制品和装置。 自动设计系统包括计算机，该计算机被配置为在候选函数的规范形式中生成每个排列组的候选排列中的二阶签名。 系统选择第一和第二对称子组，确定候选函数和第一和第二对称子组的二阶签名，并将二阶签名与库单元函数的对应二阶签名进行比较。 如果签名匹配，则继续排列，第一和第二对称子组被包括在中间排列中。 如果不是，则系统不再产生从第一和第二对称子组开始的更多的中间排列。 将进一步的对称子组添加到中间置换中。 对于每个新的对称子组，系统产生该对称子组与中间置换中的每个对称子组的配对，并将配对的二阶签名与库函数中的相应的二阶签名进行比较。 如果在任何时候任何二阶签名与其对应的库函数签名不匹配，则该系统不会产生从中间置换的当前序列开始的更多的中间排列，而是移除新的对称子组，并尝试继续构建前一个 中间置换 当置换组中的所有对称子组都被加到中间置换时，中间置换成候选排列。

公开(公告)号：US06543037B1

公开(公告)日：2003-04-01

申请号：US09465498

申请日：1999-12-16

Applicant: Johnson Chan Limqueco ,  Hong Li ,  Krishna Belkhale ,  Devadas Varma

Inventor： Johnson Chan Limqueco ,  Hong Li ,  Krishna Belkhale ,  Devadas Varma

IPC: G06F1750

CPC classification number: G06F17/505

Abstract: Provided are a method, article of manufacture, and apparatus for estimating delays of networks. An automated design system comprises a computer configured to identify a critical path in a network, calculate a delay for the technology-mapped version of the network, calculate a delay for the technology-independent version of the network, calculate a scale factor from the technology-mapped and technology-independent delays, and apply the scale factor to all the delays in the technology-independent network.

Abstract translation: 提供了一种用于估计网络延迟的方法，制造品和装置。 自动设计系统包括被配置为识别网络中的关键路径的计算机，计算网络的技术映射版本的延迟，计算与技术无关版本的网络的延迟，从该技术计算比例因子 和技术无关的延迟，并将比例因子应用于与技术无关的网络中的所有延迟。