公开(公告)号：US20060292292A1

公开(公告)日：2006-12-28

申请号：US11510545

申请日：2006-08-25

申请人： Thomas Brightman ,  Andrew Funk ,  David Husak ,  Edward McLellan ,  Andrew Brown ,  John Brown ,  James Farrell ,  Donald Priore ,  Mark Sankey ,  Paul Schmitt

发明人： Thomas Brightman ,  Andrew Funk ,  David Husak ,  Edward McLellan ,  Andrew Brown ,  John Brown ,  James Farrell ,  Donald Priore ,  Mark Sankey ,  Paul Schmitt

IPC分类号： B05D5/06

CPC分类号： H04L49/10 ,  H04L49/254 ,  H04L49/3009 ,  H04L49/3036

摘要： An integrated circuit (203) for use in processing streams of data generally and streams of packets in particular. The integrated circuit (203) includes a number of packet processors (307, 313, 303), a table look up engine (301), a queue management engine (305) and a buffer management engine (315). The packet processors (307, 313, 303) include a receive processor (421), a transmit processor (427) and a risc core processor (401), all of which are programmable. The receive processor (421) and the core processor (401) cooperate to receive and route packets being received and the core processor (401) and the transmit processor (427) cooperate to transmit packets. Routing is done by using information from the table look up engine (301) to determine a queue (215) in the queue management engine (305) which is to receive a descriptor (217) describing the received packet's payload.