公开(公告)号：US5982459A

公开(公告)日：1999-11-09

申请号：US872858

申请日：1997-06-11

申请人： Jan Fandrianto ,  Bryan R. Martin ,  Doug G. Neubauer ,  Duat H. Tran ,  Matthew D. Cressa ,  Arijanto Soemedi

发明人： Jan Fandrianto ,  Bryan R. Martin ,  Doug G. Neubauer ,  Duat H. Tran ,  Matthew D. Cressa ,  Arijanto Soemedi

IPC分类号： H04N7/14 ,  H04N7/12 ,  H04N5/14

CPC分类号： H04N7/142

摘要： A multimedia processor contains a general purpose RISC and video processors which operate in parallel to execute software for combined video and audio bit stream coding and decoding. The RISC processor controls operation of the multimedia processor and performs bit stream parsing and coding, audio compression and decompression, and general processing for embedded applications. The video processor performs video encoding and decoding functions such as scaling, filtering, decimation, and DCT transforms. The RISC processor and the video processor each have separate data buses which are interconnected through a portal circuit and a Huffman codec. Each data bus has a DMA controller which transfers data to and from a memory interface to an external memory. DMA channels serve I/O interface resources coupled to the data buses and can form buffers in the external memory. This reduces the need for on-chip FIFO buffers and separate buffers between the multimedia processor and attached devices.

摘要翻译： 多媒体处理器包含通用RISC和视频处理器，其并行操作以执行用于组合的视频和音频比特流编码和解码的软件。 RISC处理器控制多媒体处理器的操作，并执行位流分析和编码，音频压缩和解压缩，以及嵌入式应用程序的通用处理。 视频处理器执行诸如缩放，滤波，抽取和DCT变换之类的视频编码和解码功能。 RISC处理器和视频处理器各自具有通过门电路和霍夫曼编解码器互连的独立数据总线。 每个数据总线都有一个DMA控制器，它将数据传输到存储器接口和从存储器接口传输到外部存储器。 DMA通道提供耦合到数据总线的I / O接口资源，并且可以在外部存储器中形成缓冲器。 这减少了片上FIFO缓冲器和多媒体处理器和附加设备之间的单独缓冲区的需要。