公开(公告)号：US5390196A

公开(公告)日：1995-02-14

申请号：US975311

申请日：1992-11-12

申请人： Brian D. Cecil ,  Edmund Kaemper

发明人： Brian D. Cecil ,  Edmund Kaemper

IPC分类号： H03M13/09 ,  G06F11/12

CPC分类号： H03M13/091

摘要： A fast and memory efficient software method for generating a checksum employing a 32-bit generator polynomial such as X.sup.32 +X.sup.26 +X.sup.23 +X.sup.22 +X.sup.16 +X.sup.12 +X.sup.11 +X.sup.10 +X.sup.8 +X.sup.7 +X.sup.5 +X.sup.4 +X.sup.2 +X.sup.1 +X.sup.0. This end is achieved by performing the successive steps of reversing the 32-bit polynomial, to obtain hexadecimal EDB88320 in the example, as an initial CRC; XORing the least significant unprocessed byte of the data set with the least significant 8-bit byte of the CRC as currently positioned to obtain X8, X7, X6, X5, X4, X3, X2, X1; shifting the CRC right eight bits; for Xi=X8 to X3, inclusive, successively testing the highest numbered unprocessed Xi bit to determine if it is a one or a zero; if the Xi bit being tested is a zero, the CRC remains unchanged for this bit; if the Xi bit being tested is a one, then XOR the shifted CRC with the a 32-bit pattern of Xi corresponding to EDB88320 shifted right zero places for X8, one place for X7, two places for X6, three places for X5, four places for X4 and five places for X3; for Xi=X2 and X1, successively testing the highest numbered unprocessed Xi bit to determine if it is a one or a zero; if the Xi bit being tested is a zero, the CRC remains unchanged for this bit; if the Xi bit being tested is a one, then XOR the shifted CRC with the a 32-bit pattern of Xi corresponding to a second predetermined polynomial, hexadecimal EE0E612C in the example, shifted right zero places for X2 and one place for X1; if bytes of the data set remain to be processed, looping to process the next byte; and if the last byte has been processed, appending the current value of the CRC to the data set as a checksum.

摘要翻译： 一种用于产生使用32位生成多项式（如X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 + X2 + X1 + X0）的校验和的快速且高记忆效率的软件方法。 该结束是通过执行反转32位多项式的连续步骤来实现的，以获得该示例中的十六进制EDB88320作为初始CRC; 将目前定位为获得X8，X7，X6，X5，X4，X3，X2，X1的CRC的最低有效8位字节的数据集的最低有效未处理字节进行异或; 将CRC右移8位; 对于Xi = X8到X3，包括，连续测试最高编号的未处理的Xi位，以确定它是一个还是零; 如果被测试的Xi位为零，则该位保持不变; 如果被测试的Xi位是一个，则XOR与对应于EDB88320的X对应的32位模式的移位CRC移位到X8的右零位，X7的一个位置，X6的两个位置，X5的三个位置，四个 X3的地方和X3的五个地方; 对于Xi = X2和X1，连续测试最高编号的未处理的Xi位，以确定它是一个还是零; 如果被测试的Xi位为零，则该位保持不变; 如果正在测试的Xi位是一个，则XOR是具有对应于第二预定多项式的32位模式的移位CRC，在该示例中为十六进制EE0E612C，向右移位零位，X2为X1，X1为一; 如果数据集的字节仍然被处理，循环处理下一个字节; 并且如果最后一个字节已被处理，则将当前的CRC值附加到数据集作为校验和。