Method and system for reducing soft-writing in a multi-level flash memory

    公开(公告)号:US20060140010A1

    公开(公告)日:2006-06-29

    申请号:US11144174

    申请日:2005-06-02

    IPC分类号: G11C16/04

    CPC分类号: G11C16/3454

    摘要: A system and method for reducing soft-writing in a multilevel flash memory during read or verify includes a memory cell. A first and second reference cells are coupled to the memory cell and are configured to receive a first and a second voltage. A current comparison circuit is coupled to the first and second reference cells and to the memory cell and is configured to compare current flow through the memory cell with current flow through the first and second reference cells, and to determine whether the memory cell holds a first range of values while the first reference cell receives the first voltage, and if the memory cell does not hold the first range of values, to determine whether the memory cell holds a second range of values while the second reference cell receives the second voltage, thereby reducing soft-writing during the read operation.