公开(公告)号：US06656647B2

公开(公告)日：2003-12-02

申请号：US09935353

申请日：2001-08-22

申请人： Guenther Gerstmeier ,  Frank Richter ,  Valentin Rosskopf

发明人： Guenther Gerstmeier ,  Frank Richter ,  Valentin Rosskopf

IPC分类号： G03F900

CPC分类号： H01L22/34 ,  G11C29/006

摘要： In a method for examining structures on a wafer, at least one mask, which is applied on the wafer and is fabricated by exposure processes, is used for fabricating the structures. Test circuits with test structures are placed on the mask in predetermined reference positions. In order to check the structures and/or the exposure processes, electrical parameters of the test circuits are detected and evaluated in a location-dependent manner.