公开(公告)号：US07801718B2

公开(公告)日：2010-09-21

申请号：US11680020

申请日：2007-02-28

申请人： Subodh M. Reddy ,  Gustavo R. Wilke ,  Rajeev Murgai

发明人： Subodh M. Reddy ,  Gustavo R. Wilke ,  Rajeev Murgai

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5036

摘要： A method of analyzing timing uncertainty involves creating an accurate model of one or more circuit elements of a mesh circuit residing within a window that covers a subset of the mesh circuit. An approximate model of one or more circuit elements of the mesh circuit residing outside of the window is also created. Monte Carlo simulations are performed on the combination of the accurate model and the approximate model to determine a plurality of timing values, wherein each run of the Monte Carlo simulation varies one or more parameters potentially affecting the operation of the mesh circuit. An uncertainty associated with the circuit elements is determined, based at least in part on the plurality of timing values. One embodiment considers clock as the signal whose timing uncertainty can be determined. Other embodiments model and simulate the global drive circuit that drives the mesh circuit separately from the mesh circuit to take into account common path correlations in the drive circuit.

摘要翻译： 分析定时不确定性的方法涉及创建驻留在覆盖网状电路的子集的窗口内的网状电路的一个或多个电路元件的精确模型。 还创建了位于窗户外部的网状电路的一个或多个电路元件的近似模型。 对精确模型和近似模型的组合执行蒙特卡罗模拟，以确定多个时间值，其中蒙特卡洛模拟的每次运行改变潜在地影响网格电路的操作的一个或多个参数。 至少部分地基于多个定时值来确定与电路元件相关联的不确定性。 一个实施例将时钟视为可以确定其定时不确定性的信号。 其他实施例模拟和模拟驱动网格电路与网状电路分离的全局驱动电路，以考虑驱动电路中的公共路径相关性。