公开(公告)号：US20090225269A1

公开(公告)日：2009-09-10

申请号：US12242936

申请日：2008-10-01

申请人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

发明人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136204

摘要： An active device array mother substrate including a substrate, a plurality of active device arrays, a plurality of common bus lines, at least one first transparent conductive pattern layer, and at least one second transparent conductive pattern layer is provided. The substrate has a plurality of predetermined areas, and the active device arrays are respectively disposed in the predetermined areas. The common bus lines are respectively disposed in the predetermined areas to surround the active device arrays. The first transparent conductive pattern layer is connected or coupled between adjacent two common bus lines. The second transparent conductive pattern layer is extended to the adjacent predetermined area to be connected or coupled to the adjacent common bus line.

摘要翻译： 提供了包括基板，多个有源器件阵列，多个公共总线，至少一个第一透明导电图案层和至少一个第二透明导电图案层的有源器件阵列母基板。 衬底具有多个预定区域，并且有源器件阵列分别设置在预定区域中。 公共总线分别设置在预定区域中以包围有源器件阵列。 第一透明导电图案层在相邻的两条公共总线之间连接或耦合。 第二透明导电图案层被延伸到相邻的预定区域以被连接或耦合到相邻的公共总线。

公开(公告)号：US07872726B2

公开(公告)日：2011-01-18

申请号：US12242936

申请日：2008-10-01

申请人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

发明人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136204

摘要： An active device array mother substrate including a substrate, a plurality of active device arrays, a plurality of common bus lines, at least one first transparent conductive pattern layer, and at least one second transparent conductive pattern layer is provided. The substrate has a plurality of predetermined areas, and the active device arrays are respectively disposed in the predetermined areas. The common bus lines are respectively disposed in the predetermined areas to surround the active device arrays. The first transparent conductive pattern layer is connected or coupled between adjacent two common bus lines. The second transparent conductive pattern layer is extended to the adjacent predetermined area to be connected or coupled to the adjacent common bus line.

摘要翻译： 提供了包括基板，多个有源器件阵列，多个公共总线，至少一个第一透明导电图案层和至少一个第二透明导电图案层的有源器件阵列母基板。 衬底具有多个预定区域，并且有源器件阵列分别设置在预定区域中。 公共总线分别设置在预定区域中以包围有源器件阵列。 第一透明导电图案层在相邻的两条公共总线之间连接或耦合。 第二透明导电图案层被延伸到相邻的预定区域以被连接或耦合到相邻的公共总线。