公开(公告)号：US20090089349A1

公开(公告)日：2009-04-02

申请号：US11941072

申请日：2007-11-15

Applicant: Chi-Tung Chang ,  Hua-Han Lee ,  Yu-Ling Chen

Inventor： Chi-Tung Chang ,  Hua-Han Lee ,  Yu-Ling Chen

IPC: G06F7/548

CPC classification number: G06F7/548

Abstract: Computing an angle between a real part and an imaginary part of a complex number includes receiving complex number data; generating a first value, a second value and a determination result according to the complex number data; choosing a dividend and a divisor of a division operation from the first value and the second value for generating a division result according to magnitudes of the first value and the second value; performing table look-up for the division result to generate a table look-up result according to a preserved table; and adjusting the table look-up result for generating an angle corresponding to the complex number data according to the determination result.

Abstract translation: 计算复数的实部和虚部之间的角度包括接收复数数据; 根据复数数据生成第一值，第二值和确定结果; 从所述第一值和所述第二值中选择除数运算的除数和除数，以根据所述第一值和所述第二值的大小来产生除法结果; 执行表查找划分结果以根据保留表生成表查找结果; 以及根据确定结果调整表查找结果以产生与复数数据对应的角度。

公开(公告)号：US08166088B2

公开(公告)日：2012-04-24

申请号：US11609017

申请日：2006-12-11

Applicant: Hua-Han Lee ,  I-Hung Lin

Inventor： Hua-Han Lee ,  I-Hung Lin

IPC: G06F15/00

CPC classification number: G06F17/142

Abstract: An implement method of a FFT processor comprises the following steps. First, a 21 point FFT processor, which has an output and an input receiving a 2n+1 point data, is provided. A 2n-point FFT processor having an input and an output is provided. Sequentially, a multiplexer, which has a first input coupled to the output of the 21 point FFT processor, a second input receiving a 2n point data and an output coupled to the input of the 2n point FFT processor, is provided. When an input data is a 2n point data, the second input of multiplexer is coupled to the output thereof, and when an input data is a 2n+1 point data, the first input of multiplexer is coupled to the output thereof.

Abstract translation: FFT处理器的实现方法包括以下步骤。 首先，提供具有输出和接收2n + 1点数据的输入的21点FFT处理器。 提供具有输入和输出的2n点FFT处理器。 顺序地，提供了具有耦合到21点FFT处理器的输出的第一输入的多路复用器，接收2n点数据的第二输入和耦合到2n点FFT处理器的输入的输出。 当输入数据为2n点数据时，多路复用器的第二输入端耦合到其输出端，当输入数据为2n + 1点数据时，多路复用器的第一输入端与其输出端相连。

公开(公告)号：US20070180011A1

公开(公告)日：2007-08-02

申请号：US11609017

申请日：2006-12-11

Applicant: Hua-Han Lee ,  I-Hung Lin

Inventor： Hua-Han Lee ,  I-Hung Lin

IPC: G06F17/14

CPC classification number: G06F17/142

Abstract: An implement method of a FFT processor comprises the following steps. First, a 21 point FFT processor, which has an output and an input receiving a 2n+1 point data, is provided. A 2n-point FFT processor having an input and an output is provided. Sequentially, a multiplexer, which has a first input coupled to the output of the 21 point FFT processor, a second input receiving a 2n point data and an output coupled to the input of the 2n point FFT processor, is provided. When an input data is a 2n point data, the second input of multiplexer is coupled to the output thereof, and when an input data is a 2n+1 point data, the first input of multiplexer is coupled to the output thereof.

Abstract translation: FFT处理器的实现方法包括以下步骤。 首先，提供具有输出和接收2n + 1 +点数据的输入的2＆lt; 1＆gt;点FFT处理器。 提供了具有输入和输出的二阶点FFT处理器。 顺序地，多路复用器具有耦合到2点FFT处理器的输出的第一输入端，接收第二点数据的第二输入端和耦合到 提供了2点“点”FFT处理器的输入。 当输入数据是2点的点数据时，多路复用器的第二输入耦合到其输出端，并且当输入数据是第2 + 1 + 1点数据 多路复用器的第一输入耦合到其输出端。