公开(公告)号：US06286097B1

公开(公告)日：2001-09-04

申请号：US09267881

申请日：1999-03-11

申请人： Nai-Shung Chang ,  Yung-Hui Chen ,  Hui-Li Chou

发明人： Nai-Shung Chang ,  Yung-Hui Chen ,  Hui-Li Chou

IPC分类号： G06F9445

CPC分类号： G06F13/4226

摘要： A computer chipset having reduced peripheral pins for accessing a conventional ROM in a computer system is disclosed. There is a switching circuit within the chipset. When the computer is turned on, a booting control circuit activates a booting enabling signal, so that booting programs can be accessed from the ROM through the switching circuit and are executed in a main processor. Subsequently, contents stored in the ROM are moved to a main memory and the booting enabling signal is inactivated by the booting control circuit to allow a peripheral control circuit to communicate with peripheral devices. In this way, chipset having a low pin count (LPC) interface circuit can share the peripheral pins of the chipset to access the conventional ROMs, so that the production costs can be reduced.

摘要翻译： 公开了一种具有减少用于访问计算机系统中的常规ROM的外围引脚的计算机芯片组。 芯片组内有开关电路。 当计算机打开时，启动控制电路激活启动使能信号，从而可以通过切换电路从ROM访问引导程序，并在主处理器中执行。 随后，存储在ROM中的内容被移动到主存储器，并且引导启动信号被引导控制电路去激活，以允许外围控制电路与外围设备通信。 以这种方式，具有低引脚数（LPC）接口电路的芯片组可以共享芯片组的外围引脚以访问常规的ROM，从而可以降低生产成本。