公开(公告)号：US20130313655A1

公开(公告)日：2013-11-28

申请号：US13878524

申请日：2012-07-18

Applicant: Guilei Wang ,  Hushan Cui ,  Chao Zhao

Inventor： Guilei Wang ,  Hushan Cui ,  Chao Zhao

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7846 ,  H01L29/045 ,  H01L29/66553 ,  H01L29/66636

Abstract: A semiconductor device comprises a substrate; a shallow trench isolation embedded in the substrate and forms at least one opening region; a channel region located in the opening region; a gate stack including a gate dielectric layer and a gate electrode layer, located above said channel region; a source/drain region located on both sides of the channel region, including a stress layer which provides strain for the channel region. A liner layer is provided between the shallow trench isolation and the stress layer, which serves as a crystal seed layer of the stress layer. A liner layer and a pad oxide layer are provided between the substrate and the shallow trench isolation. The liner layer is inserted between the STI and the stress layer of the source/drain region as a crystal seed layer or nucleating layer for epitaxial growth, thereby eliminating the STI edge effect during the source/drain strain engineering.

Abstract translation: 半导体器件包括衬底; 嵌入衬底中的浅沟槽隔离物并形成至少一个开口区域; 位于所述开口区域中的通道区域; 包括位于所述沟道区上方的栅极介质层和栅极电极层的栅极堆叠; 位于沟道区两侧的源/漏区，包括为沟道区提供应变的应力层。 衬底层设置在浅沟槽隔离层和应力层之间，其作为应力层的晶种子层。 衬底层和衬垫氧化物层设置在衬底和浅沟槽隔离之间。 衬垫层作为晶种层或用于外延生长的成核层插入到STI和源极/漏极区的应力层之间，从而消除了源极/漏极应变工程中的STI边缘效应。