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公开(公告)号:US5434998A
公开(公告)日:1995-07-18
申请号:US33661
申请日:1993-03-16
申请人: Hajime Akai , Isao Domoto , Eiji Nakamoto , Yoshitugu Morioka , Shunsuke Hayashi
发明人: Hajime Akai , Isao Domoto , Eiji Nakamoto , Yoshitugu Morioka , Shunsuke Hayashi
CPC分类号: G06F11/2025 , G06F11/20 , G06F11/2038 , G06F11/2048
摘要: A dual computer system comprising a pair of processor units, and a dual control unit for controlling which of the two processor units are to be kept operating or on standby in case of failure of the operated unit; wherein the dual control unit controls which processor unit is to be operated through monitoring of the operating states of the two processor units, and comprising two independent interruption devices for indicating the switching of the two processor units through interruption. The system is effective in improving the continuity of the control at the time of switching.
摘要翻译: 一种双计算机系统,包括一对处理器单元,以及用于控制两个处理器单元中的哪一个将在被操作单元故障的情况下保持操作或待机的双重控制单元; 其中所述双重控制单元通过监视两个处理器单元的操作状态来控制哪个处理器单元被操作,并且包括两个独立的中断设备,用于通过中断来指示两个处理器单元的切换。 该系统在切换时有效地提高控制的连续性。