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    Method and apparatus for efficient design and analysis of integrated circuits using multiple time scales
    1.
    发明授权
    Method and apparatus for efficient design and analysis of integrated circuits using multiple time scales 失效
    使用多个时间尺度对集成电路进行有效设计和分析的方法和装置

    公开(公告)号：US5995733A

    公开(公告)日：1999-11-30

    申请号：US789353

    申请日：1997-01-27

    Applicant: Jaijeet Roychowdhury

    Inventor： Jaijeet Roychowdhury

    IPC: G06F17/50 ,  G06F15/20

    CPC classification number: G06F17/5036

    Abstract: Novel algorithms for computing the responses of circuits to multi-tone excitations. The new algorithms are efficient and robust for large, strongly nonlinear circuits excited by multi-tone (quasi-periodic or envelope-modulated) signals. Hence they are particularly useful for integrated RF applications. The multivariate representation captures features produced by strong nonlinearities (such as spikes or pulses) much more compactly than traditional frequency- or time-domain representations. The new algorithms compute these functions efficiently by solving a partial differential equation ODE) in the time or mixed frequency-time domains. Frequency-domain spectra or time-domain waveforms are generated from the multivariate functions as cheap post-processing steps. Two methods, multivariate FDTD and hierarchical shooting, are purely time-domain techniques suitable for the general strongly nonlinear circuit problem. They differ in their memory and computation needs. A new mixed frequency-time method is more efficient for circuits that are moderately (but not strongly) nonlinear in one or more tones (e.g., switching mixers, switched-capacitor filters). The linear systems at the core of all three techniques are especially well suited for iterative solution. This is exploited in the methods to achieve linear growth of computation and memory with respect to circuit size. The mixed frequency-time method of this work avoids the ill-conditioning problem by computing with the slow harmonic components directly, rather than with time-domain samples at sets of points close to each other.

    Abstract translation: 用于计算电路对多音激励的响应的新算法。 对于由多音调（准周期或包络调制）信号激发的大型强非线性电路，新算法是有效且鲁棒的。 因此，它们对集成RF应用特别有用。 多变量表示法比传统的频域或时域表征更加紧凑地捕获强非线性（如尖峰或脉冲）产生的特征。 新算法在时间或混合频域中通过求解偏微分方程ODE）来有效地计算这些函数。 频域光谱或时域波形从多变量函数生成为便宜的后处理步骤。 多变量FDTD和分层拍摄的两种方法，纯粹是适用于一般强非线性电路问题的时域技术。 他们的记忆和计算需求不同。 对于在一个或多个音调（例如开关混频器，开关电容滤波器）中的中等（但不强）非线性的电路，新的混合频率 - 时间方法更有效。 所有三种技术核心的线性系统特别适用于迭代解决方案。 在电路尺寸方面实现了计算和存储器的线性增长的方法。 这种工作的混合频率 - 时间方法通过直接用慢谐波分量计算避免了病态调节问题，而不是在彼此靠近的点集合处的时域样本。

    Systems and methods for testing and manufacturing large-scale, transistor-based, nonlinear circuits
    2.
    发明授权
    Systems and methods for testing and manufacturing large-scale, transistor-based, nonlinear circuits 失效
    用于测试和制造大规模，基于晶体管的非线性电路的系统和方法

    公开(公告)号：US5930153A

    公开(公告)日：1999-07-27

    申请号：US845963

    申请日：1997-04-30

    Applicant: Robert C. Melville ,  Jaijeet Roychowdhury

    Inventor： Robert C. Melville ,  Jaijeet Roychowdhury

    IPC: G06F17/50

    CPC classification number: G06F17/5036

    Abstract: Systems and methods that include a homotopy technique are employed to find a DC operating point of large-scale, transistor-based, nonlinear circuits�, allowing such circuits to be designed, tested and manufactured!. The systems and methods use arclength continuation together with a new two-phase embedding of .lambda. into equations describing the circuits. One of the systems includes: (1) a DC operating point determination circuit (or determinor) that receives parameters relating to the nonlinear circuit into a globally-convergent model thereof and embeds therein at least two arclength continuation parameters relating to driving-point and transfer characteristics of a transistor in the nonlinear circuit�, the DC operating point determination circuit capable of adjusting the arclength continuation parameters to cause the globally-convergent model to converge on a DC operating point for the nonlinear circuit! and (2) an analysis circuit, coupled to the DC operating point determination circuit, that employs the DC operating point to determine an overall response characteristic of the nonlinear circuit

    Abstract translation: 包括同伦技术的系统和方法被用于找到大规模，基于晶体管的非线性电路的直流工作点[允许这种电路被设计，测试和制造]。 系统和方法使用延迟连续性以及将新的两相嵌入的lambda纳入描述电路的方程式中。 其中一个系统包括：（1）DC运行点确定电路（或者确定器），其将与非线性电路相关的参数接收到其全局收敛模型中，并将其中嵌入与驱动点和​​传输相关的至少两个延迟连续参数 非线性电路中的晶体管的特性[，能够调整持续参数以使全局收敛模型收敛于非线性电路的直流工作点的直流工作点确定电路]和（2）分析电路， 耦合到DC工作点确定电路，其使用DC工作点来确定非线性电路的总体响应特性

    Systems and methods for determining characteristics of a singular circuit
    3.
    发明授权
    Systems and methods for determining characteristics of a singular circuit 失效
    用于确定奇异电路特性的系统和方法

    公开(公告)号：US5844821A

    公开(公告)日：1998-12-01

    申请号：US841298

    申请日：1997-04-29

    Applicant: Jaijeet Roychowdhury

    Inventor： Jaijeet Roychowdhury

    IPC: G06F17/16 ,  G06F17/50

    CPC classification number: G06F17/5036 ,  G06F17/16

    Abstract: Systems and methods for determining one or more characteristics of a singular circuit, allowing such circuits to be efficiently designed, tested and manufactured. One of the systems includes: (1) a minimum least-squares ("MLS") determination circuit that receives parameters relating to the singular circuit into a matrix A, determines range and null spaces for the matrix A, applies an orthonormalization procedure to determine a solution x to Ax=b', where b' is an orthogonal projection of a known vector b onto the range space of the matrix A and derives an MLS solution from the solution x and (2) a simulation circuit, coupled to the MLS determination circuit, that employs the MLS solution to simulate an operation of the singular circuit and determine the characteristic therefrom.

    Abstract translation: 用于确定奇异电路的一个或多个特性的系统和方法，允许这样的电路被有效地设计，测试和制造。 其中一个系统包括：（1）将与奇异电路有关的参数接收到矩阵A中的最小最小平方（“MLS”）确定电路确定矩阵A的范围和空间，应用正交归一化过程来确定 求解x到Ax = b'，其中b'是已知向量b在矩阵A的范围空间上的正交投影，并从解x获得MLS解;和（2）耦合到MLS的模拟电路 确定电路，其采用MLS解决方案来模拟奇异电路的操作并确定其特性。

    Method of making an integrated circuit including noise modeling and prediction
    6.
    发明授权
    Method of making an integrated circuit including noise modeling and prediction 失效
    制造包括噪声建模和预测的集成电路的方法

    公开(公告)号：US6072947A

    公开(公告)日：2000-06-06

    申请号：US933733

    申请日：1997-09-23

    Applicant: Jaijeet Roychowdhury ,  Peter Feldmann ,  David Esley Long

    Inventor： Jaijeet Roychowdhury ,  Peter Feldmann ,  David Esley Long

    IPC: G06F17/50

    CPC classification number: G06F17/5036

    Abstract: A frequency-domain analysis method computes noise power spectral densities (PSDs) in nonlinear circuits. The method uses harmonic components of the periodic time-varying PSD of cyclostationary noise, i.e., harmonic power spectral densities which are deterministic functions that describe the time-varying second-order statistics of cyclostationary noise. A block-structured matrix equation is used which relates output noise statistics to input noise statistics. By exploiting Toeplitz block structure, an efficient noise calculation method requires O(nN log N) computation time and O(nN) memory, where n is the circuit size and N is the number of significant harmonics in the circuit's steady state. The method successfully treats device noise sources with arbitrarily shaped PSDs (including thermal, shot, and flicker noises), handles noise input correlations and computes correlations between different outputs.

    Abstract translation: 频域分析方法计算非线性电路中的噪声功率谱密度（PSD）。 该方法使用循环平稳噪声​​的周期性时变PSD的谐波分量，即谐波功率谱密度，其是描述周期平稳噪声的时变二阶统计的确定性函数。 使用块结构矩阵方程，其将输出噪声统计与输入噪声统计相关联。 通过利用Toeplitz块结构，有效的噪声计算方法需要O（nN log N）计算时间和O（nN）存储器，其中n是电路尺寸，N是电路稳态中有效谐波的数量。 该方法使用任意形状的PSD（包括热，射击和闪烁噪声）成功处理设备噪声源，处理噪声输入相关性并计算不同输出之间的相关性。

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