公开(公告)号：US07793022B2

公开(公告)日：2010-09-07

申请号：US12219565

申请日：2008-07-24

Applicant: James Denis Travers ,  Padraig Ryan

Inventor： James Denis Travers ,  Padraig Ryan

IPC: G06F13/00 ,  G06F13/36

CPC classification number: H04L1/243 ,  H04L1/205

Abstract: A digital bit-level repeater for joining two wired-AND buses such as the I2C bus is described. A protocol detector is used for tracking clock and data signals to determine the direction of the transfer. A state machine reads and regenerates the clock lines of both buses and provides the clock-stretching protocol feature on both buses. The repeater is designed to pass data bits from one bus to the other transparently when possible, and to latch and hold each data bit until the receiving bus can be clocked when clock-stretching occurs or when the bus is turned around.

Abstract translation: 描述用于连接诸如I2C总线的两个有线和总线的数字位级中继器。 协议检测器用于跟踪时钟和数据信号以确定传输的方向。 状态机读取并重新生成两条总线的时钟线，并在两条总线上提供时钟延伸协议功能。 中继器被设计为在可能时将数据位从一个总线传输到另一个总线，并且锁存和保持每个数据位，直到当时钟延长发生时或当总线转向时才能对接收总线进行时钟控制。

公开(公告)号：US20090031065A1

公开(公告)日：2009-01-29

申请号：US12219565

申请日：2008-07-24

Applicant: James Denis Travers ,  Padraig Ryan

Inventor： James Denis Travers ,  Padraig Ryan

IPC: G06F13/14

CPC classification number: H04L1/243 ,  H04L1/205

Abstract: A digital bit-level repeater for joining two wired-AND buses such as the I2C bus is described. A protocol detector is used for tracking clock and data signals to determine the direction of the transfer. A state machine reads and regenerates the clock lines of both buses and provides the clock-stretching protocol feature on both buses. The repeater is designed to pass data bits from one bus to the other transparently when possible, and to latch and hold each data bit until the receiving bus can be clocked when clock-stretching occurs or when the bus is turned around.

Abstract translation: 描述用于连接诸如I2C总线的两个有线和总线的数字位级中继器。 协议检测器用于跟踪时钟和数据信号以确定传输的方向。 状态机读取并重新生成两条总线的时钟线，并在两条总线上提供时钟延伸协议功能。 中继器被设计为在可能时将数据位从一个总线传输到另一个总线，并且锁存和保持每个数据位，直到当时钟延长发生时或当总线转向时才能对接收总线进行时钟控制。