公开(公告)号：US08122303B2

公开(公告)日：2012-02-21

申请号：US12122768

申请日：2008-05-19

申请人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

发明人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

IPC分类号： G11C29/00

CPC分类号： G06F12/0246 ,  G06F11/1068

摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

公开(公告)号：US08055983B2

公开(公告)日：2011-11-08

申请号：US12126344

申请日：2008-05-23

申请人： Jian Qiang Ni ,  Dong Yu He ,  Chun Ting Liao

发明人： Jian Qiang Ni ,  Dong Yu He ,  Chun Ting Liao

IPC分类号： H03M13/00

CPC分类号： G06F11/1068

摘要： A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which requires smaller storing space. In an embodiment of the error correction encoding/decoding method, an erase checking value corresponding to the status where all the bytes of data area and parameter storing area are “0xff” is provided to improve the security of stored data.

摘要翻译： 公开了一种闪速存储器的数据写入方法及其纠错编码/解码方法。 在数据写入方法的一个实施例中，使用从伽罗瓦域GF（29）导出的Reed-Solomon码的6比特ECC方案用于编码用于生成需要较小存储空间的冗余的数据。 在纠错编码/解码方法的实施例中，提供与数据区和参数存储区的全部字节为“0xff”的状态对应的擦除检查值，以提高存储数据的安全性。

公开(公告)号：US20080294935A1

公开(公告)日：2008-11-27

申请号：US12122768

申请日：2008-05-19

申请人： Jian-Qiang NI ,  Dong-Yu He ,  Chun-Ting Liao

发明人： Jian-Qiang NI ,  Dong-Yu He ,  Chun-Ting Liao

IPC分类号： G06F11/08 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G06F11/1068

摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

摘要翻译： 公开了一种闪速存储器的数据结构及其数据读/写方法。 分别将512字节数据和从用6位纠错码方案编码的数据导出的冗余码分别存储在闪速存储器的块中的具有顺序地址的第一扇区和第二扇区中。 该块的逻辑块地址信息被分成存储在第一扇区和第二扇区中的两部分。

公开(公告)号：US08327230B2

公开(公告)日：2012-12-04

申请号：US13344671

申请日：2012-01-06

申请人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

发明人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

IPC分类号： G11C29/00

CPC分类号： G06F12/0246 ,  G06F11/1068

摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

摘要翻译： 公开了一种闪速存储器的数据结构及其数据读/写方法。 分别将512字节数据和从用6位纠错码方案编码的数据导出的冗余码分别存储在闪速存储器的块中的具有顺序地址的第一扇区和第二扇区中。 该块的逻辑块地址信息被分成存储在第一扇区和第二扇区中的两部分。

公开(公告)号：US20120110419A1

公开(公告)日：2012-05-03

申请号：US13344671

申请日：2012-01-06

申请人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

发明人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： G06F12/0246 ,  G06F11/1068

摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

摘要翻译： 公开了一种闪速存储器的数据结构及其数据读/写方法。 分别将512字节数据和从用6位纠错码方案编码的数据导出的冗余码分别存储在闪速存储器的块中的具有顺序地址的第一扇区和第二扇区中。 该块的逻辑块地址信息被分成存储在第一扇区和第二扇区中的两部分。

公开(公告)号：US20080294965A1

公开(公告)日：2008-11-27

申请号：US12126344

申请日：2008-05-23

申请人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

发明人： Jian-Qiang Ni ,  Dong-Yu He ,  Chun-Ting Liao

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： G06F11/1068

摘要： A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which requires smaller storing space. In an embodiment of the error correction encoding/decoding method, an erase checking value corresponding to the status where all the bytes of data area and parameter storing area are “0xff” is provided to improve the security of stored data.

摘要翻译： 公开了一种闪速存储器的数据写入方法及其纠错编码/解码方法。 在数据写入方法的一个实施例中，使用从伽罗瓦域GF（29）导出的Reed-Solomon码的6比特ECC方案用于编码用于生成需要较小存储空间的冗余的数据。 在纠错编码/解码方法的实施例中，提供与数据区和参数存储区的全部字节为“0xff”的状态对应的擦除检查值，以提高存储数据的安全性。