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公开(公告)号:US06368900B1
公开(公告)日:2002-04-09
申请号:US09501374
申请日:2000-02-11
IPC分类号: H01L2182
CPC分类号: H01L23/5252 , H01L2924/0002 , H01L2924/00
摘要: A process for forming an amorphous silicon, antifuse element, on an underlying, raised tungsten plug structure, has been developed. The process features the recessing of the insulator layer, in which the tungsten plug structure resides, resulting in a raised portion of a tungsten plug structure. Conductive spacers are then formed on the exposed sides of the raised portion of the tungsten plug structure, resulting in smooth edges, at the perophery of the raised tungsten plug structure. An amorphous silicon layer is then deposited and defined to create the amorphous silicon, antifuse element, on the underlying raised tungsten plug structure, smoothed via the addition of the conductive, sidewall spacers. The use of the underlying, smooth, raised tungsten plug structure, alleviates excessive current crowding, presnet at the edges of the raised tungsten plug structure, during a high voltage pulsing procedure, performed to the overlying antifuse element.
摘要翻译: 已经开发了用于在下面的凸起的钨插塞结构上形成非晶硅,反熔丝元件的工艺。 该方法的特征在于钨插塞结构所在的绝缘体层的凹陷,导致钨插塞结构的凸起部分。 然后,在钨插头结构的凸起部分的暴露侧上形成导电间隔物,从而在凸起的钨插头结构的多孔处形成光滑的边缘。 然后沉积和限定非晶硅层以在下面的隆起的钨插塞结构上产生非晶硅,反熔丝元件,通过添加导电侧壁间隔物而平滑化。 在高电压脉冲过程中,使用底层的,平滑的,提升的钨插头结构,减轻过度的电流拥挤,在升高的钨插塞结构的边缘处,对上覆的反熔丝元件执行。