公开(公告)号：US09146739B2

公开(公告)日：2015-09-29

申请号：US13517779

申请日：2012-06-14

申请人： James J. Bonanno ,  Marcel Mitran ,  Brian R. Prasky ,  Joran Siu ,  Timothy J. Slegel ,  Alexander Vasilevskiy

发明人： James J. Bonanno ,  Marcel Mitran ,  Brian R. Prasky ,  Joran Siu ,  Timothy J. Slegel ,  Alexander Vasilevskiy

IPC分类号： G06F9/30 ,  G06F9/38

CPC分类号： G06F9/30058 ,  G06F9/3806 ,  G06F9/3844

摘要： Embodiments relate to branch prediction preloading. An aspect includes a system for branch prediction preloading. The system includes an instruction cache and branch target buffer (BTB) coupled to a processing circuit, the processing circuit configured to perform a method. The method includes fetching a plurality of instructions in an instruction stream from the instruction cache, and decoding a branch prediction preload instruction in the instruction stream. An address of a predicted branch instruction is determined based on the branch prediction preload instruction. A predicted target address is determined based on the branch prediction preload instruction. A mask field is identified in the branch prediction preload instruction, and a branch instruction length is determined based on the mask field. Based on executing the branch prediction preload instruction, the BTB is preloaded with the address of the predicted branch instruction, the branch instruction length, the branch type, and the predicted target address.

摘要翻译： 实施例涉及分支预测预加载。 一方面包括用于分支预测预加载的系统。 该系统包括耦合到处理电路的指令高速缓存和分支目标缓冲器（BTB），所述处理电路被配置为执行方法。 该方法包括从指令高速缓冲存储器中取出指令流中的多个指令，以及对指令流中的分支预测预加载指令进行解码。 基于分支预测预加载指令来确定预测分支指令的地址。 基于分支预测预加载指令来确定预测目标地址。 在分支预测预加载指令中识别掩码字段，并且基于掩码字段来确定分支指令长度。 基于执行分支预测预加载指令，BTB预先加载预测分支指令的地址，分支指令长度，分支类型和预测目标地址。

公开(公告)号：US20130339691A1

公开(公告)日：2013-12-19

申请号：US13517779

申请日：2012-06-14

申请人： James J. Bonanno ,  Marcel Mitran ,  Brian R. Prasky ,  Joran Siu ,  Timothy J. Slegel ,  Alexander Vasilevskiy

发明人： James J. Bonanno ,  Marcel Mitran ,  Brian R. Prasky ,  Joran Siu ,  Timothy J. Slegel ,  Alexander Vasilevskiy

IPC分类号： G06F9/38

CPC分类号： G06F9/30058 ,  G06F9/3806 ,  G06F9/3844

摘要： Embodiments relate to branch prediction preloading. An aspect includes a system for branch prediction preloading. The system includes an instruction cache and branch target buffer (BTB) coupled to a processing circuit, the processing circuit configured to perform a method. The method includes fetching a plurality of instructions in an instruction stream from the instruction cache, and decoding a branch prediction preload instruction in the instruction stream. An address of a predicted branch instruction is determined based on the branch prediction preload instruction. A predicted target address is determined based on the branch prediction preload instruction. A mask field is identified in the branch prediction preload instruction, and a branch instruction length is determined based on the mask field. Based on executing the branch prediction preload instruction, the BTB is preloaded with the address of the predicted branch instruction, the branch instruction length, the branch type, and the predicted target address.

摘要翻译： 实施例涉及分支预测预加载。 一方面包括用于分支预测预加载的系统。 该系统包括耦合到处理电路的指令高速缓存和分支目标缓冲器（BTB），所述处理电路被配置为执行方法。 该方法包括从指令高速缓冲存储器中取出指令流中的多个指令，以及对指令流中的分支预测预加载指令进行解码。 基于分支预测预加载指令来确定预测转移指令的地址。 基于分支预测预加载指令来确定预测目标地址。 在分支预测预加载指令中识别掩码字段，并且基于掩码字段来确定分支指令长度。 基于执行分支预测预加载指令，BTB预先加载预测分支指令的地址，分支指令长度，分支类型和预测目标地址。