SILICONE BLANKET OF MULTILAYER STRUCTURE FOR MICRO PATTERN OFFSET PRINTING
    1.
    发明申请
    SILICONE BLANKET OF MULTILAYER STRUCTURE FOR MICRO PATTERN OFFSET PRINTING 审中-公开
    用于微型图形印刷的多层结构的硅胶滤纸

    公开(公告)号:US20110223432A1

    公开(公告)日:2011-09-15

    申请号:US13113556

    申请日:2011-05-23

    IPC分类号: B32B9/04

    摘要: Provided is a silicon blanket for a micro pattern offset printing that includes a first layer wherein the solvent absorption rate has been enhanced by elevating the proportion of low vinyl polysiloxane and adding silicon gum; and a second layer wherein the mechanical strength has been enhanced by elevating the content of high vinyl polysiloxane; thus, increasing the lifetime and initial printing quality.

    摘要翻译: 本发明提供一种微图案胶版印刷用硅橡胶,其包括第一层,其中通过提高低乙烯基聚硅氧烷的比例并加入硅胶来增强溶剂吸收速率; 以及通过提高高乙烯基聚硅氧烷的含量而增强了机械强度的第二层; 从而延长寿命和初始打印质量。

    Semiconductor device and operating method thereof
    2.
    发明授权
    Semiconductor device and operating method thereof 有权
    半导体器件及其操作方法

    公开(公告)号:US08766708B2

    公开(公告)日:2014-07-01

    申请号:US13525805

    申请日:2012-06-18

    申请人: Jun-Gyu Lee

    发明人: Jun-Gyu Lee

    IPC分类号: G05F1/10

    CPC分类号: G11C5/147

    摘要: A semiconductor device includes an internal voltage input buffer configured to determine voltage levels of a pull-up driving node and a pull-down driving node as a result of a comparison between a voltage level of an internal voltage node and a voltage level of a reference voltage node such that the pull-up driving node and the pull-down driving node to maintain a voltage level difference, and an internal voltage driving block configured to pull-up drive the internal voltage node in response to the voltage level of the pull-up driving node and pull-down drive the internal voltage node in response to the voltage level of the pull-down driving node.

    摘要翻译: 半导体器件包括内部电压输入缓冲器,其被配置为通过内部电压节点的电压电平与参考电压的电平之间的比较来确定上拉驱动节点和下拉驱动节点的电压电平 电压节点,使得上拉驱动节点和下拉驱动节点保持电压电平差;以及内部电压驱动块,其被配置为响应于所述下拉驱动节点的电压电平上拉驱动内部电压节点, 上拉驱动节点和下拉驱动内部电压节点响应于下拉驱动节点的电压电平。

    Voltage regulation circuit
    3.
    发明授权
    Voltage regulation circuit 有权
    电压调节电路

    公开(公告)号:US08441311B2

    公开(公告)日:2013-05-14

    申请号:US12966683

    申请日:2010-12-13

    申请人: Jun Gyu Lee

    发明人: Jun Gyu Lee

    IPC分类号: G05F3/02 G05F1/10

    CPC分类号: G05F3/205 G05F1/575

    摘要: A voltage regulation circuit includes: a first voltage divider that divides a regulation voltage with a predetermined division ratio to generate a division voltage; a first current driving force control unit configured to compare a reference voltage with the division voltage and generate a first control signal; a current driving unit configured to generate a driving current with a variable driving force based on the first control signal and a second control signal, and generate the regulation voltage; and a second current driving force control unit configured to generate the second control signal in accordance with a level variation of the regulation voltage.

    摘要翻译: 电压调节电路包括:第一分压器,其以预定的分频比分压调节电压以产生分压; 第一电流驱动力控制单元,被配置为将参考电压与分频电压进行比较,并产生第一控制信号; 电流驱动单元,被配置为基于第一控制信号和第二控制信号产生具有可变驱动力的驱动电流,并产生调节电压; 以及第二电流驱动力控制单元,被配置为根据调节电压的电平变化产生第二控制信号。

    VOLTAGE REGULATION CIRCUIT
    4.
    发明申请
    VOLTAGE REGULATION CIRCUIT 有权
    电压调节电路

    公开(公告)号:US20120001604A1

    公开(公告)日:2012-01-05

    申请号:US12966683

    申请日:2010-12-13

    申请人: Jun Gyu LEE

    发明人: Jun Gyu LEE

    IPC分类号: G05F1/00

    CPC分类号: G05F3/205 G05F1/575

    摘要: A voltage regulation circuit includes: a first voltage divider that divides a regulation voltage with a predetermined division ratio to generate a division voltage; a first current driving force control unit configured to compare a reference voltage with the division voltage and generate a first control signal; a current driving unit configured to generate a driving current with a variable driving force based on the first control signal and a second control signal, and generate the regulation voltage; and a second current driving force control unit configured to generate the second control signal in accordance with a level variation of the regulation voltage.

    摘要翻译: 电压调节电路包括:第一分压器,其以预定的分频比分压调节电压以产生分压; 第一电流驱动力控制单元,被配置为将参考电压与分频电压进行比较,并产生第一控制信号; 电流驱动单元,被配置为基于第一控制信号和第二控制信号产生具有可变驱动力的驱动电流,并产生调节电压; 以及第二电流驱动力控制单元,被配置为根据调节电压的电平变化产生第二控制信号。

    SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF 有权
    半导体器件及其工作方法

    公开(公告)号:US20130147546A1

    公开(公告)日:2013-06-13

    申请号:US13525805

    申请日:2012-06-18

    申请人: Jun-Gyu LEE

    发明人: Jun-Gyu LEE

    IPC分类号: G05F3/02

    CPC分类号: G11C5/147

    摘要: A semiconductor device includes an internal voltage input buffer configured to determine voltage levels of a pull-up driving node and a pull-down driving node as a result of a comparison between a voltage level of an internal voltage node and a voltage level of a reference voltage node such that the pull-up driving node and the pull-down driving node to maintain a voltage level difference, and an internal voltage driving block configured to pull-up drive the internal voltage node in response to the voltage level of the pull-up driving node and pull-down drive the internal voltage node in response to the voltage level of the pull-down driving node.

    摘要翻译: 半导体器件包括内部电压输入缓冲器,其被配置为通过内部电压节点的电压电平与参考电压的电平之间的比较来确定上拉驱动节点和下拉驱动节点的电压电平 电压节点,使得上拉驱动节点和下拉驱动节点保持电压电平差;以及内部电压驱动块,其被配置为响应于所述下拉驱动节点的电压电平上拉驱动内部电压节点, 上拉驱动节点和下拉驱动内部电压节点响应于下拉驱动节点的电压电平。