Masked Register Write Method and Apparatus
    1.
    发明申请
    Masked Register Write Method and Apparatus 有权
    屏蔽寄存器写入方法和装置

    公开(公告)号:US20110231587A1

    公开(公告)日:2011-09-22

    申请号:US12724932

    申请日:2010-03-16

    IPC分类号: G06F12/02 G06F13/20

    CPC分类号: G06F13/385

    摘要: A hardware device register is written without transferring the register content from the hardware device to a host device over an interface bus for modification. The hardware device receives an address identifying the target register included in the hardware device and bit information associated with a write operation involving the target register from the host device over the interface bus. The address is stored in a first register included in the hardware device and dedicated for supporting write operations. The bit information is stored in a second register included in the hardware device and also dedicated for supporting write operations. The target register is accessed based on the address stored in the first register dedicated for supporting write operations and one or more bits of the target register are written based on the bit information without first transferring the register content to the host device over the interface bus.

    摘要翻译: 写入硬件设备寄存器,而不通过接口总线将硬件设备的寄存器内容传送到主机设备进行修改。 硬件设备通过接口总线从主机设备接收标识包括在硬件设备中的目标寄存器的地址和与涉及目标寄存器的写入操作相关联的位信息。 该地址存储在包括在硬件设备中的专用于支持写入操作的第一寄存器中。 位信息存储在包括在硬件设备中的第二寄存器中,并且还专用于支持写入操作。 基于存储在专用于支持写入操作的第一寄存器中的地址来访问目标寄存器,并且基于位信息写入目标寄存器的一个或多个位,而无需通过接口总线将寄存器内容传送到主机设备。

    Masked register write method and apparatus
    2.
    发明授权
    Masked register write method and apparatus 有权
    屏蔽寄存器写入方法和装置

    公开(公告)号:US08397005B2

    公开(公告)日:2013-03-12

    申请号:US12724932

    申请日:2010-03-16

    IPC分类号: G06F12/02

    CPC分类号: G06F13/385

    摘要: A hardware device register is written without transferring the register content from the hardware device to a host device over an interface bus for modification. The hardware device receives an address identifying the target register included in the hardware device and bit information associated with a write operation involving the target register from the host device over the interface bus. The address is stored in a first register included in the hardware device and dedicated for supporting write operations. The bit information is stored in a second register included in the hardware device and also dedicated for supporting write operations. The target register is accessed based on the address stored in the first register dedicated for supporting write operations and one or more bits of the target register are written based on the bit information without first transferring the register content to the host device over the interface bus.

    摘要翻译: 写入硬件设备寄存器,而不通过接口总线将硬件设备的寄存器内容传送到主机设备进行修改。 硬件设备通过接口总线从主机设备接收标识包括在硬件设备中的目标寄存器的地址和与涉及目标寄存器的写入操作相关联的位信息。 该地址存储在包括在硬件设备中的专用于支持写入操作的第一寄存器中。 位信息存储在包括在硬件设备中的第二寄存器中,并且还专用于支持写入操作。 基于存储在专用于支持写入操作的第一寄存器中的地址来访问目标寄存器,并且基于位信息写入目标寄存器的一个或多个位,而无需通过接口总线将寄存器内容传送到主机设备。