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公开(公告)号:US06680654B2
公开(公告)日:2004-01-20
申请号:US09999679
申请日:2001-10-24
申请人: Gerald R. Fischer , Talley J. Allen , Ken K. Tsai
发明人: Gerald R. Fischer , Talley J. Allen , Ken K. Tsai
IPC分类号: H03L7085
摘要: A phase locked loop (10) for generating a variable output frequency signal. The phase locked loop (10) includes a controlled oscillator (14) to generate the variable output frequency signal in response to a tune signal. A phase detector (18) is activable in response to a gating signal (20) to generate an error signal representing a difference between a reference frequency signal and the variable output frequency signal. A loop filter (12) having a filter characteristic, filters the error signal and generates the tune signal. An offset cancellation circuit (22) is coupled to the loop filter (12). In response to an error signal representing phase offset of the phase locked loop (10), the offset cancellation circuit (22) supplies a compensating signal to reduce the phase offset.
摘要翻译: 一种用于产生可变输出频率信号的锁相环(10)。 锁相环(10)包括受控振荡器(14),以响应于调谐信号产生可变输出频率信号。 相位检测器(18)可响应选通信号(20)而激活,以产生表示参考频率信号和可变输出频率信号之间的差的误差信号。 具有滤波器特性的环路滤波器(12),对误差信号进行滤波并产生调谐信号。 偏移消除电路(22)耦合到环路滤波器(12)。 响应于表示锁相环(10)的相位偏移的误差信号,偏移消除电路(22)提供补偿信号以减小相位偏移。