Distributed digital exchange with improved switching system and input
processor
    1.
    发明授权
    Distributed digital exchange with improved switching system and input processor 失效
    具有改进的交换系统和输入处理器的分布式数字交换

    公开(公告)号:US4488290A

    公开(公告)日:1984-12-11

    申请号:US405103

    申请日:1982-08-04

    IPC分类号: H04Q11/04

    CPC分类号: H04Q11/0407

    摘要: A distributed digital exchange for completing a communications link between a selected originating channel and one or more selected destination channels. The exchange includes an input bus containing a given number of input lines, with each input line for conveying a time-division-multiplexed plurality of time-division-multiplexed input signals, with each data bit position of every frame of each input signal defining a discrete originating channel; a clock system for providing timing signals for defining frames and bit positions corresponding to the frames and bit positions of the input signals; an exchange bus containing at least the given number of lines for conveying the input signals; a novel input processor for receiving the input signals, for synchronizing the input signals in response to the timing signals and for transferring each received plurality of input signals from a selected line of the input bus to a selected line of the exchange bus; an output bus containing at least the given number of output lines, with each output line for conveying a time-division-multiplexed output signal, with each data bit position of every frame of each output signal defining a discrete destination channel; a plurality of novel switching systems, each of which includes circuits for routing data from any selected data bit position in a frame of any selected time-division-multiplexed input signal on a selected line of the exchange bus to one or more selected data bit positions in a frame of any selected time-division-multiplexed output signal; and a controller for controlling the selections.

    摘要翻译: 一种分布式数字交换机,用于完成所选发起信道与一个或多个所选择的目的信道之间的通信链路。 该交换机包括一个包含给定数量的输入线的输入总线,每个输入线用于传送时分多路复用多个时分复用输入信号,每个输入信号的每一帧的每个数据位位置定义一个 离散始发通道; 时钟系统,用于提供用于定义对应于输入信号的帧和比特位置的帧和比特位置的定时信号; 至少包含用于传送输入信号的给定行数的交换总线; 一种新颖的输入处理器,用于接收输入信号,用于响应于定时信号同步输入信号,并用于将每个接收到的多个输入信号从输入总线的所选行传送到交换总线的选定行; 输出总线至少包含给定数量的输出线,每个输出线用于传送时分复用输出信号,每个输出信号的每个帧的每个数据位位置定义离散的目的地信道; 多个新颖的切换系统,每个新颖的交换系统包括用于将数据从在交换总线的选定行上的任何选择的时分多路复用输入信号的帧中的任何选择的数据位位置路由到一个或多个所选数据位位置的电路 在任何选择的时分复用输出信号的帧中; 以及用于控制选择的控制器。