公开(公告)号：US5430723A

公开(公告)日：1995-07-04

申请号：US61218

申请日：1993-05-13

申请人： Hiroshi Nakaide ,  Katsuhiko Nakamoto ,  Kensaburo Namba ,  Shinji Hiyama ,  Satoshi Takeda

发明人： Hiroshi Nakaide ,  Katsuhiko Nakamoto ,  Kensaburo Namba ,  Shinji Hiyama ,  Satoshi Takeda

IPC分类号： H04Q3/52 ,  H04Q11/04 ,  H04Q11/08

CPC分类号： H04Q11/08

摘要： A time switch control system having a cross-connect function is used for digital time-division. Multiplex communications permit desired channel settings and reduce power consumption. Identifying circuits identify which time-slot signals are to be retained by an input signal retaining memory, and output identification information to the retention memory, and to a retention memory controller. The retention memory controller stores therein the identification information from the identifying circuits, then reads out the identification information, and controls the input signal retaining memory in accordance with the contents of the identification information. Only the specified time-slot signals are stored and retained by the input signal retaining memory, thereby reducing power requirements. Exchange/output circuits exchange the time-slot signals stored in the input signal retaining memory in accordance with channel setting information, and output the exchanged signals.

摘要翻译： 具有交叉连接功能的时间切换控制系统被用于数字时分。 多路复用通信允许所需的通道设置并降低功耗。 识别电路识别由输入信号保持存储器保留哪些时隙信号，并将识别信息输出到保持存储器以及保持存储器控制器。 保持存储器控制器从识别电路存储识别信息，然后读出识别信息，并根据识别信息的内容控制输入信号保持存储器。 只有指定的时隙信号由输入信号保持存储器存储和保留，从而减少功率要求。 交换/输出电路根据信道设置信息交换存储在输入信号保持存储器中的时隙信号，并输出所交换的信号。