Method and apparatus for verifying memory contents
    1.
    发明授权
    Method and apparatus for verifying memory contents 有权
    用于验证存储器内容的方法和装置

    公开(公告)号:US08918612B1

    公开(公告)日:2014-12-23

    申请号:US13400256

    申请日:2012-02-20

    CPC classification number: G06F12/0246 G06F2212/7209 H04L63/0428 H04L63/0823

    Abstract: A system and method of verifying a content of a non-volatile reprogrammable memory communicatively coupled to a microprocessor is disclosed. The method comprises the steps of reading at least a portion of the data stored in the non-volatile reprogrammable memory via a second communication path secured by encryption, generating a computed integrity value according to at least a portion of the contents of the non-volatile reprogrammable memory, and reading an integrity value, and comparing the computed integrity value with the read integrity value.

    Abstract translation: 公开了一种验证通信地耦合到微处理器的非易失性可编程存储器的内容的系统和方法。 该方法包括以下步骤:经由通过加密保护的第二通信路径读取存储在非易失性可重新编程存储器中的数据的至少一部分,根据非易失性存储器的内容的至少一部分生成计算的完整性值 可编程存储器,以及读取完整性值,并将计算的完整性值与读取的完整性值进行比较。

    Multiprocessor conditional access module and method for using the same
    2.
    发明授权
    Multiprocessor conditional access module and method for using the same 有权
    多处理器条件访问模块及其使用方法

    公开(公告)号:US07530108B1

    公开(公告)日:2009-05-05

    申请号:US10791934

    申请日:2004-03-03

    Abstract: A system and method of controlling access to a media program via a receiver communicably coupleable to a conditional access module is described. The apparatus comprises a first processor, a second processor, and an interface module, communicatively coupled to the first processor and the second processor, the interface module for processing all communications with the conditional access module and externally manifesting a single virtual processor to the receiver.

    Abstract translation: 描述了通过可通信地耦合到条件访问模块的接收器来控制对媒体节目的访问的系统和方法。 该装置包括通信地耦合到第一处理器和第二处理器的第一处理器,第二处理器和接口模块,接口模块,用于处理与条件访问模块的所有通信,并向接收器外部显示单个虚拟处理器。

    Method and apparatus for verifying memory contents
    3.
    发明授权
    Method and apparatus for verifying memory contents 有权
    用于验证存储器内容的方法和装置

    公开(公告)号:US08122215B1

    公开(公告)日:2012-02-21

    申请号:US10792484

    申请日:2004-03-03

    CPC classification number: G06F12/0246 G06F2212/7209 H04L63/0428 H04L63/0823

    Abstract: A system and method of verifying a content of a non-volatile reprogrammable memory communicatively coupled to a microprocessor is disclosed. The method comprises the steps of reading at least some of the data stored in the non-volatile reprogrammable memory, computing a value related to contents of the non-volatile reprogrammable memory, and comparing the value with a stored integrity value. The apparatus comprises a microprocessor, a non-volatile reprogrammable memory communicatively coupled to the microprocessor via a first communication path, the non-volatile memory for storing microprocessor program instructions, and a logical module, communicatively coupled to the non-volatile memory via a communication path independent from the first communication path, the logical module for verifying the data stored in the non-volatile reprogrammable memory by comparison of the contents of the non-volatile reprogrammable memory with a stored integrity value.

    Abstract translation: 公开了一种验证通信地耦合到微处理器的非易失性可编程存储器的内容的系统和方法。 该方法包括以下步骤:读取存储在非易失性可编程存储器中的数据中的至少一些,计算与非易失性可编程存储器的内容相关的值,以及将该值与存储的完整性值进行比较。 该装置包括微处理器,经由第一通信路径通信地耦合到微处理器的非易失性可再编程存储器,用于存储微处理器程序指令的非易失性存储器以及通过通信通信地耦合到非易失性存储器的逻辑模块 逻辑模块,用于通过将非易失性可重新编程存储器的内容与存储的完整性值进行比较来验证存储在非易失性可再编程存储器中的数据。

    FM stereo decoder and method using digital signal processing
    4.
    发明授权
    FM stereo decoder and method using digital signal processing 失效
    FM立体声解码器和使用数字信号处理的方法

    公开(公告)号:US5404405A

    公开(公告)日:1995-04-04

    申请号:US105323

    申请日:1993-08-05

    CPC classification number: H04B1/1653

    Abstract: A digital FM stereo decoder uses the phase characteristics of linear phase FIR filters, together with a trignometric operation, to generate a 38 kHz subcarrier signal from a 19 kHz pilot. The subcarrier signal is mixed with the input composite signal from which the pilot has been removed to shift its L-R component to baseband; the linear phase FIR filters also maintain phase coherence between the subcarrier and the composite signals. A low distortion output is obtained without the use of a phase locked loop for the regeneration of the subcarrier signal.

    Abstract translation: 数字FM立体声解码器使用线性相位FIR滤波器的相位特性以及轨道运算来产生来自19kHz导频的38kHz子载波信号。 子载波信号与导频已经被去除的输入复合信号混合,以将其L-R分量移位到基带; 线性相位FIR滤波器也保持副载波和复合信号之间的相位相干性。 在不使用用于子载波信号的再生的锁相环的情况下,获得低失真输出。

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