AUTOMATION OF FUSE COMPRESSION FOR AN ASIC DESIGN SYSTEM
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    发明申请
    AUTOMATION OF FUSE COMPRESSION FOR AN ASIC DESIGN SYSTEM 失效
    用于ASIC设计系统的保险丝压缩自动化

    公开(公告)号:US20070047343A1

    公开(公告)日:2007-03-01

    申请号:US11552166

    申请日:2006-10-24

    IPC分类号: G11C29/00

    CPC分类号: G11C29/802 H03K19/1735

    摘要: A method and system for repairing defective memory in a semiconductor chip. The chip has memory locations, redundant memory, and a central location for ordered fuses. The ordered fuses identify in compressed format defective sections of the memory locations. The defective sections are replaceable by sections of the redundant memory. The ordered fuses have an associated a fuse bit pattern of bits which sequentially represents the defective sections in the compressed format. The method and system determines the order in which the memory locations are wired together; designs a shift register of latches through the memory locations in accordance with the order in which the memory locations are wired together; and associates each of the latches with a corresponding bit of an uncompressed bit pattern from which the fuse bit pattern is derived. The uncompressed bit pattern comprises a sequence of bits, representing the defective sections in uncompressed format.

    摘要翻译: 一种用于修复半导体芯片中的有缺陷的存储器的方法和系统。 该芯片具有存储器位置,冗余存储器和用于有序保险丝的中心位置。 有序保险丝以压缩格式识别存储器位置的缺陷部分。 有缺陷的部分可由冗余存储器的部分替换。 有序保险丝具有相关联的熔丝位模式,其顺序地表示压缩格式的缺陷部分。 方法和系统确定存储器位置连接在一起的顺序; 根据存储器位置连接在一起的顺序,通过存储器位置设计锁存器的移位寄存器; 并且将每个锁存器与从其导出熔丝位模式的未压缩位模式的对应位相关联。 未压缩比特模式包括一个比特序列,表示未压缩格式的缺陷部分。