公开(公告)号：US08683163B2

公开(公告)日：2014-03-25

申请号：US11983754

申请日：2007-11-08

Applicant: Alistair G. Morfey ,  Karl Leighton Swepson ,  Neil Edward Johnson ,  Martin David Cooper ,  Alan Mycroft

Inventor： Alistair G. Morfey ,  Karl Leighton Swepson ,  Neil Edward Johnson ,  Martin David Cooper ,  Alan Mycroft

IPC: G06F12/00

CPC classification number: G06F1/24 ,  G06F8/4434 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/324 ,  G06F11/10

Abstract: A data processing apparatus comprises a processor constructed to operate under control of a sequence of program instructions selected from a predetermined instruction set; master circuitry to request access to storage locations of the processor; an interface circuit to provide an interface for an external apparatus to signal a request for access to the storage locations and an interface for the master circuitry to signal a request for access to the storage locations; and control to provide access between the storage locations and the interface circuit in response to the request only at predetermined points in execution of the stored program, the control being operable to fix periods of time for providing such access relative to the sequence of program instructions such that execution timing of the stored instructions is independent of whether a request is supplied to the interface.

Abstract translation: 一种数据处理装置，包括：处理器，被构造成在从预定指令集中选择的程序指令序列的控制下进行操作; 主电路请求访问处理器的存储位置; 接口电路，用于提供用于外部设备的接口，用于向接入存储位置发出信号请求;以及接口，用于主电路向接收存储位置的信号通知信号; 以及控制以仅在存储的程序的执行中的预定点响应于该请求而在存储位置和接口电路之间提供接入，该控制可操作以固定相对于程序指令序列提供这种访问的时间段， 所存储的指令的执行定时与是否向该接口提供请求无关。

公开(公告)号：US20080320247A1

公开(公告)日：2008-12-25

申请号：US11983754

申请日：2007-11-08

Applicant: Alistair G. Morfey ,  Karl Leighton Swepson ,  Neil Edward Johnson ,  Martin David Cooper ,  Alan Mycroft

Inventor： Alistair G. Morfey ,  Karl Leighton Swepson ,  Neil Edward Johnson ,  Martin David Cooper ,  Alan Mycroft

IPC: G06F12/00

CPC classification number: G06F1/24 ,  G06F8/4434 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/324 ,  G06F11/10

Abstract: A data processing apparatus comprises a processor constructed to operate under control of a sequence of program instructions selected from a predetermined instruction set; master circuitry to request access to storage locations of the processor; an interface circuit to provide an interface for an external apparatus to signal a request for access to the storage locations and an interface for the master circuitry to signal a request for access to the storage locations; and control to provide access between the storage locations and the interface circuit in response to the request only at predetermined points in execution of the stored program, the control being operable to fix periods of time for providing such access relative to the sequence of program instructions such that execution timing of the stored instructions is independent of whether a request is supplied to the interface.

Abstract translation: 一种数据处理装置，包括：处理器，被构造成在从预定指令集中选择的程序指令序列的控制下进行操作; 主电路请求访问处理器的存储位置; 接口电路，用于提供用于外部设备的接口，用于向接入存储位置发出信号请求;以及接口，用于主电路向接收存储位置的信号通知信号; 以及控制以仅在存储的程序的执行中的预定点响应于该请求而在存储位置和接口电路之间提供接入，该控制可操作以固定相对于程序指令序列提供这种访问的时间段， 所存储的指令的执行定时与是否向该接口提供请求无关。