Manufacturing method for semiconductor integrated circuit device
    1.
    发明授权
    Manufacturing method for semiconductor integrated circuit device 有权
    半导体集成电路器件的制造方法

    公开(公告)号:US07871871B2

    公开(公告)日:2011-01-18

    申请号:US12393087

    申请日:2009-02-26

    IPC分类号: H01L21/66

    摘要: In mass production of CMIS integrated circuit devices or the like, electric characteristics, such as Vth (threshold voltage) or the like, disadvantageously vary due to variations in gate length of the MISFET. This problem has become serious because of a short channel effect. In order to solve the problem, various kinds of feed-forward techniques have been studied in which a subsequent variation factor process is regulated to be reversed with respect to variations in a previous variation factor process so as to cause these variation factors to cancel each other out. Since the feed-back technique has an effect of the cancellation process over the entire system, the technique can be relatively easily applied to a product with a single type of MISFE, but is difficult to be applied to a product equipped with a plurality of types of MISFETs. The invention is adapted to adjust the amount of halo implantation by multivariate analysis based on the result of a patterning step of the gate electrode and a film forming step of an offset spacer.

    摘要翻译: 在大规模生产CMIS集成电路器件等时,诸如Vth(阈值电压)等的电特性由于MISFET的栅极长度的变化而不利地变化。 这个问题已经变得严重,因为通道效应很短。 为了解决这个问题,已经研究了各种前馈技术,其中随后的变化因子过程被调整为相对于先前的变化因子过程的变化而被反转,以使这些变化因子相互抵消 出来 由于反馈技术具有整个系统的取消处理的效果,因此该技术可以相对容易地应用于具有单一类型的MISFE的产品,但是难以应用于配备有多种类型的产品 的MISFETs。 本发明适用于基于栅电极的图案形成步骤和偏移间隔物的成膜步骤的结果,通过多元分析来调整光晕注入量。

    MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    2.
    发明申请
    MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路器件的制造方法

    公开(公告)号:US20090221105A1

    公开(公告)日:2009-09-03

    申请号:US12393087

    申请日:2009-02-26

    IPC分类号: H01L21/66 H01L21/8238

    摘要: In mass production of CMIS integrated circuit devices or the like, electric characteristics, such as Vth (threshold voltage) or the like, disadvantageously vary due to variations in gate length of the MISFET. This problem has become serious because of a short channel effect. In order to solve the problem, various kinds of feed-forward techniques have been studied in which a subsequent variation factor process is regulated to be reversed with respect to variations in a previous variation factor process so as to cause these variation factors to cancel each other out. Since the feed-back technique has an effect of the cancellation process over the entire system, the technique can be relatively easily applied to a product with a single type of MISFE, but is difficult to be applied to a product equipped with a plurality of types of MISFETs. The invention is adapted to adjust the amount of halo implantation by multivariate analysis based on the result of a patterning step of the gate electrode and a film forming step of an offset spacer.

    摘要翻译: 在大规模生产CMIS集成电路器件等时,诸如Vth(阈值电压)等的电特性由于MISFET的栅极长度的变化而不利地变化。 这个问题已经变得严重,因为通道效应很短。 为了解决这个问题,已经研究了各种前馈技术,其中随后的变化因子过程被调整为相对于先前的变化因子过程的变化而被反转,以使这些变化因子相互抵消 出来 由于反馈技术具有整个系统的取消处理的效果,因此该技术可以相对容易地应用于具有单一类型的MISFE的产品,但是难以应用于配备有多种类型的产品 的MISFETs。 本发明适用于基于栅电极的图案形成步骤和偏移间隔物的成膜步骤的结果,通过多元分析来调整光晕注入量。