摘要:
Techniques are disclosed for determination of parameter variability for one or more given interconnects of a plurality of interconnects in a simulated semiconductor circuit. The simulated semiconductor circuit is defined at least in part by a plurality of input parameters. From a distribution of first values of a given input parameter, a plurality of the first values are determined to use when calculating a corresponding plurality of second values for each of one or more output parameters. By using at least the determined plurality of first values for the given input parameter and selected values for other input parameters in the plurality of input parameters, the corresponding plurality of second values are calculated for each of the one or more output parameters. The one or more output parameters correspond to the one or more given interconnects. Each of the second values corresponds to one of the determined plurality of first values.
摘要:
Disclosed herein are methods and apparatus that automatically generate an electric circuit model from process parameters used to specify a semiconductor fabrication procedure, wherein at least one of the process parameters is specified as a statistical distribution. The methods and apparatus convert the process parameters into an electric circuit model. The electric circuit model is specified in terms of electric parameters, wherein at least one of the electric parameters is specified in terms of a statistical distribution. The methods and apparatus thus allow a process engineer whose expertise may not extend to state-of-the-art circuit modeling to develop insight into the effect of process parameter selection on the performance of the resulting electric circuit. The resulting insight is further enhanced since at least one of the electric parameters is specified in terms of a statistical distribution.