公开(公告)号：US07773667B2

公开(公告)日：2010-08-10

申请号：US11181286

申请日：2005-07-14

申请人： Vladimir Sindalovsky ,  Lane A. Smith ,  Ronald Lamar Freyman ,  Max Jay Olsen

发明人： Vladimir Sindalovsky ,  Lane A. Smith ,  Ronald Lamar Freyman ,  Max Jay Olsen

IPC分类号： H04B3/46 ,  H04B17/00 ,  H04Q1/20

CPC分类号： G01R31/31715

摘要： The various embodiments of the invention provide an apparatus, system and method of asynchronous testing a serializer and deserializer data communication apparatus (SERDES) for determining frequency and phase locking to pseudo asynchronous input data having a continual phase offset. An exemplary apparatus includes a data sampler adapted to sample input serial data and to provide output data; a controlled tap delay with a selected tap having a phase offset from the input serial data, in which the selected tap is selectively coupleable to the data sampler to provide pseudo asynchronous input serial data; a first variable delay control adapted to delay a reference frequency provided to the controlled tap delay in response to the pseudo asynchronous input serial data; and a second delay control adapted to adjust the plurality of taps in response to the pseudo asynchronous input serial data. In additional embodiments, the pseudo asynchronous input serial data is provided from an interpolated phase from at least two selected taps.

摘要翻译： 本发明的各种实施例提供了用于确定频率和相位锁定到具有连续相位偏移的伪异步输入数据的串行器和解串器数据通信装置（SERDES）的异步测试的装置，系统和方法。 示例性装置包括适于对输入串行数据进行采样并提供输出数据的数据采样器; 具有与输入串行数据相位偏移的所选抽头的受控抽头延迟，其中所选择的抽头选择性地耦合到数据采样器以提供伪异步输入串行数据; 第一可变延迟控制器，其适于响应于所述伪异步输入串行数据延迟提供给受控抽头延迟的参考频率; 以及适于响应于所述伪异步输入串行数据来调整所述多个抽头的第二延迟控制。 在另外的实施例中，伪异步输入串行数据从来自至少两个选择的抽头的内插相位提供。