Low-cost electrostatic clamp with fast de-clamp time
    1.
    发明授权
    Low-cost electrostatic clamp with fast de-clamp time 有权
    低成本的静电夹具具有快速的去夹紧时间

    公开(公告)号:US07714406B2

    公开(公告)日:2010-05-11

    申请号:US11924166

    申请日:2007-10-25

    CPC classification number: H01L21/6833 H02N13/00

    Abstract: A method for manufacturing a semiconductor wafer electrostatic clamp, comprising providing a mounting plate, forming an insulative layer on an insulating portion of the mounting plate, forming a first electrode on a first portion of the mounting plate, forming a second electrode on a second portion of the mounting plate, forming a first segment having a first conductivity over the first electrode, forming a first region having a second conductivity over the first segment that creates an n-p type composite, forming a second segment having a third conductivity formed over the over the second electrode, forming a second region having a fourth conductivity formed over the second region that creates an p-n type composite.

    Abstract translation: 一种制造半导体晶片静电夹的方法,包括提供安装板,在安装板的绝缘部分上形成绝缘层,在安装板的第一部分上形成第一电极,在第二部分上形成第二电极 在所述第一电极上形成具有第一导电性的第一区段,在所述第一区段上形成具有第二导电性的第一区域,所述第一区域在所述第一区段上形成np型复合材料,形成具有第三导电性的第二区段, 形成具有形成在第二区域上的第四导电性的第二区域,形成pn型复合材料的第二区域。

    LOW-COST ELECTROSTATIC CLAMP WITH FAST DE-CLAMP TIME
    2.
    发明申请
    LOW-COST ELECTROSTATIC CLAMP WITH FAST DE-CLAMP TIME 有权
    低成本静电夹具快速脱扣时间

    公开(公告)号:US20080100984A1

    公开(公告)日:2008-05-01

    申请号:US11924166

    申请日:2007-10-25

    CPC classification number: H01L21/6833 H02N13/00

    Abstract: A method for manufacturing a semiconductor wafer electrostatic clamp, comprising providing a mounting plate, forming an insulative layer on an insulating portion of the mounting plate, forming a first electrode on a first portion of the mounting plate, forming a second electrode on a second portion of the mounting plate, forming a first segment having a first conductivity over the first electrode, forming a first region having a second conductivity over the first segment that creates an n-p type composite, forming a second segment having a third conductivity formed over the over the second electrode, forming a second region having a fourth conductivity formed over the second region that creates an p-n type composite.

    Abstract translation: 一种制造半导体晶片静电夹的方法,包括提供安装板,在安装板的绝缘部分上形成绝缘层,在安装板的第一部分上形成第一电极,在第二部分上形成第二电极 在所述第一电极上形成具有第一导电性的第一区段,在所述第一区段上形成具有第二导电性的第一区域,所述第一区域在所述第一区段上形成np型复合材料,形成具有第三导电性的第二区段, 形成具有形成在第二区域上的第四导电性的第二区域,形成pn型复合材料的第二区域。

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